From patchwork Sun Jan 23 17:37:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 12721014 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7B2BC433EF for ; Sun, 23 Jan 2022 17:38:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239317AbiAWRiH (ORCPT ); Sun, 23 Jan 2022 12:38:07 -0500 Received: from mail-0301.mail-europe.com ([188.165.51.139]:59733 "EHLO mail-0301.mail-europe.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239285AbiAWRiE (ORCPT ); Sun, 23 Jan 2022 12:38:04 -0500 Date: Sun, 23 Jan 2022 17:37:49 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=connolly.tech; s=protonmail; t=1642959479; bh=Uu0q8KAJ6+bG5zjqtcOXH0AHNydbxkmYhhsv+R7TrF8=; h=Date:To:From:Reply-To:Subject:Message-ID:From:To:Cc; b=BaAiCpzoXfFJOWjcTWs7zv8svJKzTGs4OybPeFMB4ajAc+nlGNxju10TEPbga1fDF QAM8TGa6WILZnZ3pvY2JboU9hnrpTjqJcabKgvfkQ8YMSpEcy6ri53d5QsKe5KqKqS Ai633Rv0ovMSoWVWWPP3cOFnXziAPWojwl9kc8yw= To: Thierry Reding , Sam Ravnborg , David Airlie , Daniel Vetter , Rob Herring , Dmitry Torokhov , Andy Gross , Bjorn Andersson , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , Henrik Rydberg , Harigovindan P , Caleb Connolly , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, linux-arm-msm@vger.kernel.org, Alexander Martinz From: Caleb Connolly Reply-To: Caleb Connolly Subject: [PATCH 4/6] drm/panel: visionox-rm69299: support the variant found in the SHIFT6mq Message-ID: <20220123173650.290349-5-caleb@connolly.tech> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for another variant of the rm69299 panel. This panel is 1080x2160 and is found in the shift-axolotl (SHIFT6mq). Signed-off-by: Caleb Connolly --- .../gpu/drm/panel/panel-visionox-rm69299.c | 281 ++++++++++++++---- 1 file changed, 221 insertions(+), 60 deletions(-) -- 2.34.1 diff --git a/drivers/gpu/drm/panel/panel-visionox-rm69299.c b/drivers/gpu/drm/panel/panel-visionox-rm69299.c index eb43503ec97b..e3c58ed8a96a 100644 --- a/drivers/gpu/drm/panel/panel-visionox-rm69299.c +++ b/drivers/gpu/drm/panel/panel-visionox-rm69299.c @@ -20,10 +20,42 @@ struct visionox_rm69299 { struct regulator_bulk_data supplies[2]; struct gpio_desc *reset_gpio; struct mipi_dsi_device *dsi; + const struct drm_display_mode *mode; bool prepared; bool enabled; }; +static const struct drm_display_mode visionox_rm69299_1080x2248_60hz = { + .name = "1080x2248", + .clock = 158695, + .hdisplay = 1080, + .hsync_start = 1080 + 26, + .hsync_end = 1080 + 26 + 2, + .htotal = 1080 + 26 + 2 + 36, + .vdisplay = 2248, + .vsync_start = 2248 + 56, + .vsync_end = 2248 + 56 + 4, + .vtotal = 2248 + 56 + 4 + 4, + .flags = 0, +}; + +static const struct drm_display_mode visionox_rm69299_1080x2160_60hz = { + .name = "Visionox 1080x2160@60Hz", + .clock = 158695, + .hdisplay = 1080, + .hsync_start = 1080 + 26, + .hsync_end = 1080 + 26 + 2, + .htotal = 1080 + 26 + 2 + 36, + .vdisplay = 2160, + .vsync_start = 2160 + 8, + .vsync_end = 2160 + 8 + 4, + .vtotal = 2160 + 8 + 4 + 4, + .flags = 0, + .width_mm = 74, + .height_mm = 131, + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, +}; + static inline struct visionox_rm69299 *panel_to_ctx(struct drm_panel *panel) { return container_of(panel, struct visionox_rm69299, panel); @@ -68,14 +100,16 @@ static int visionox_rm69299_unprepare(struct drm_panel *panel) ret = mipi_dsi_dcs_write(ctx->dsi, MIPI_DCS_SET_DISPLAY_OFF, NULL, 0); if (ret < 0) - dev_err(ctx->panel.dev, "set_display_off cmd failed ret = %d\n", ret); + dev_err(ctx->panel.dev, "set_display_off cmd failed ret = %d\n", + ret); /* 120ms delay required here as per DCS spec */ msleep(120); ret = mipi_dsi_dcs_write(ctx->dsi, MIPI_DCS_ENTER_SLEEP_MODE, NULL, 0); if (ret < 0) { - dev_err(ctx->panel.dev, "enter_sleep cmd failed ret = %d\n", ret); + dev_err(ctx->panel.dev, "enter_sleep cmd failed ret = %d\n", + ret); } ret = visionox_rm69299_power_off(ctx); @@ -84,10 +118,123 @@ static int visionox_rm69299_unprepare(struct drm_panel *panel) return ret; } +#define VISIONOX_RM69299_SHIFT_INIT_SEQ_LEN 432 + +static const u8 visionox_rm69299_1080x2248_60hz_init_seq[VISIONOX_RM69299_SHIFT_INIT_SEQ_LEN][2] = { + { 0xFE, 0x40 }, { 0x05, 0x04 }, { 0x06, 0x08 }, { 0x08, 0x04 }, + { 0x09, 0x08 }, { 0x0A, 0x07 }, { 0x0B, 0xCC }, { 0x0C, 0x07 }, + { 0x0D, 0x90 }, { 0x0F, 0x87 }, { 0x20, 0x8D }, { 0x21, 0x8D }, + { 0x24, 0x05 }, { 0x26, 0x05 }, { 0x28, 0x05 }, { 0x2A, 0x05 }, + { 0x2D, 0x28 }, { 0x2F, 0x28 }, { 0x30, 0x32 }, { 0x31, 0x32 }, + { 0x37, 0x80 }, { 0x38, 0x30 }, { 0x39, 0xA8 }, { 0x46, 0x48 }, + { 0x47, 0x48 }, { 0x6B, 0x10 }, { 0x6F, 0x02 }, { 0x74, 0x2B }, + { 0x80, 0x1A }, { 0xFE, 0x40 }, { 0x93, 0x10 }, { 0x16, 0x00 }, + { 0x85, 0x07 }, { 0x84, 0x01 }, { 0x86, 0x0F }, { 0x87, 0x05 }, + { 0x8C, 0x00 }, { 0x88, 0x2E }, { 0x89, 0x2E }, { 0x8B, 0x09 }, + { 0x95, 0x00 }, { 0x91, 0x00 }, { 0x90, 0x00 }, { 0x8D, 0xD0 }, + { 0x8A, 0x03 }, { 0xFE, 0xA0 }, { 0x13, 0x00 }, { 0x33, 0x00 }, + { 0x0B, 0x33 }, { 0x36, 0x1E }, { 0x31, 0x88 }, { 0x32, 0x88 }, + { 0x37, 0xF1 }, { 0xFE, 0x50 }, { 0x00, 0x00 }, { 0x01, 0x00 }, + { 0x02, 0x00 }, { 0x03, 0xE9 }, { 0x04, 0x00 }, { 0x05, 0xF6 }, + { 0x06, 0x01 }, { 0x07, 0x2C }, { 0x08, 0x01 }, { 0x09, 0x62 }, + { 0x0A, 0x01 }, { 0x0B, 0x98 }, { 0x0C, 0x01 }, { 0x0D, 0xBF }, + { 0x0E, 0x01 }, { 0x0F, 0xF6 }, { 0x10, 0x02 }, { 0x11, 0x24 }, + { 0x12, 0x02 }, { 0x13, 0x4E }, { 0x14, 0x02 }, { 0x15, 0x70 }, + { 0x16, 0x02 }, { 0x17, 0xAF }, { 0x18, 0x02 }, { 0x19, 0xE2 }, + { 0x1A, 0x03 }, { 0x1B, 0x1F }, { 0x1C, 0x03 }, { 0x1D, 0x52 }, + { 0x1E, 0x03 }, { 0x1F, 0x82 }, { 0x20, 0x03 }, { 0x21, 0xB6 }, + { 0x22, 0x03 }, { 0x23, 0xF0 }, { 0x24, 0x04 }, { 0x25, 0x1F }, + { 0x26, 0x04 }, { 0x27, 0x37 }, { 0x28, 0x04 }, { 0x29, 0x59 }, + { 0x2A, 0x04 }, { 0x2B, 0x68 }, { 0x30, 0x04 }, { 0x31, 0x85 }, + { 0x32, 0x04 }, { 0x33, 0xA2 }, { 0x34, 0x04 }, { 0x35, 0xBC }, + { 0x36, 0x04 }, { 0x37, 0xD8 }, { 0x38, 0x04 }, { 0x39, 0xF4 }, + { 0x3A, 0x05 }, { 0x3B, 0x0E }, { 0x40, 0x05 }, { 0x41, 0x13 }, + { 0x42, 0x05 }, { 0x43, 0x1F }, { 0x44, 0x05 }, { 0x45, 0x1F }, + { 0x46, 0x00 }, { 0x47, 0x00 }, { 0x48, 0x01 }, { 0x49, 0x43 }, + { 0x4A, 0x01 }, { 0x4B, 0x4C }, { 0x4C, 0x01 }, { 0x4D, 0x6F }, + { 0x4E, 0x01 }, { 0x4F, 0x92 }, { 0x50, 0x01 }, { 0x51, 0xB5 }, + { 0x52, 0x01 }, { 0x53, 0xD4 }, { 0x58, 0x02 }, { 0x59, 0x06 }, + { 0x5A, 0x02 }, { 0x5B, 0x33 }, { 0x5C, 0x02 }, { 0x5D, 0x59 }, + { 0x5E, 0x02 }, { 0x5F, 0x7D }, { 0x60, 0x02 }, { 0x61, 0xBD }, + { 0x62, 0x02 }, { 0x63, 0xF7 }, { 0x64, 0x03 }, { 0x65, 0x31 }, + { 0x66, 0x03 }, { 0x67, 0x63 }, { 0x68, 0x03 }, { 0x69, 0x9D }, + { 0x6A, 0x03 }, { 0x6B, 0xD2 }, { 0x6C, 0x04 }, { 0x6D, 0x05 }, + { 0x6E, 0x04 }, { 0x6F, 0x38 }, { 0x70, 0x04 }, { 0x71, 0x51 }, + { 0x72, 0x04 }, { 0x73, 0x70 }, { 0x74, 0x04 }, { 0x75, 0x85 }, + { 0x76, 0x04 }, { 0x77, 0xA1 }, { 0x78, 0x04 }, { 0x79, 0xC0 }, + { 0x7A, 0x04 }, { 0x7B, 0xD8 }, { 0x7C, 0x04 }, { 0x7D, 0xF2 }, + { 0x7E, 0x05 }, { 0x7F, 0x10 }, { 0x80, 0x05 }, { 0x81, 0x21 }, + { 0x82, 0x05 }, { 0x83, 0x2E }, { 0x84, 0x05 }, { 0x85, 0x3A }, + { 0x86, 0x05 }, { 0x87, 0x3E }, { 0x88, 0x00 }, { 0x89, 0x00 }, + { 0x8A, 0x01 }, { 0x8B, 0x86 }, { 0x8C, 0x01 }, { 0x8D, 0x8F }, + { 0x8E, 0x01 }, { 0x8F, 0xB3 }, { 0x90, 0x01 }, { 0x91, 0xD7 }, + { 0x92, 0x01 }, { 0x93, 0xFB }, { 0x94, 0x02 }, { 0x95, 0x18 }, + { 0x96, 0x02 }, { 0x97, 0x4F }, { 0x98, 0x02 }, { 0x99, 0x7E }, + { 0x9A, 0x02 }, { 0x9B, 0xA6 }, { 0x9C, 0x02 }, { 0x9D, 0xCF }, + { 0x9E, 0x03 }, { 0x9F, 0x14 }, { 0xA4, 0x03 }, { 0xA5, 0x52 }, + { 0xA6, 0x03 }, { 0xA7, 0x93 }, { 0xAC, 0x03 }, { 0xAD, 0xCF }, + { 0xAE, 0x04 }, { 0xAF, 0x08 }, { 0xB0, 0x04 }, { 0xB1, 0x42 }, + { 0xB2, 0x04 }, { 0xB3, 0x7F }, { 0xB4, 0x04 }, { 0xB5, 0xB4 }, + { 0xB6, 0x04 }, { 0xB7, 0xCC }, { 0xB8, 0x04 }, { 0xB9, 0xF2 }, + { 0xBA, 0x05 }, { 0xBB, 0x0C }, { 0xBC, 0x05 }, { 0xBD, 0x26 }, + { 0xBE, 0x05 }, { 0xBF, 0x4B }, { 0xC0, 0x05 }, { 0xC1, 0x64 }, + { 0xC2, 0x05 }, { 0xC3, 0x83 }, { 0xC4, 0x05 }, { 0xC5, 0xA1 }, + { 0xC6, 0x05 }, { 0xC7, 0xBA }, { 0xC8, 0x05 }, { 0xC9, 0xC4 }, + { 0xCA, 0x05 }, { 0xCB, 0xD5 }, { 0xCC, 0x05 }, { 0xCD, 0xD5 }, + { 0xCE, 0x00 }, { 0xCF, 0xCE }, { 0xD0, 0x00 }, { 0xD1, 0xDB }, + { 0xD2, 0x01 }, { 0xD3, 0x32 }, { 0xD4, 0x01 }, { 0xD5, 0x3B }, + { 0xD6, 0x01 }, { 0xD7, 0x74 }, { 0xD8, 0x01 }, { 0xD9, 0x7D }, + { 0xFE, 0x60 }, { 0x00, 0xCC }, { 0x01, 0x0F }, { 0x02, 0xFF }, + { 0x03, 0x01 }, { 0x04, 0x00 }, { 0x05, 0x02 }, { 0x06, 0x00 }, + { 0x07, 0x00 }, { 0x09, 0xC4 }, { 0x0A, 0x00 }, { 0x0B, 0x04 }, + { 0x0C, 0x01 }, { 0x0D, 0x00 }, { 0x0E, 0x04 }, { 0x0F, 0x00 }, + { 0x10, 0x71 }, { 0x12, 0xC4 }, { 0x13, 0x00 }, { 0x14, 0x04 }, + { 0x15, 0x01 }, { 0x16, 0x00 }, { 0x17, 0x06 }, { 0x18, 0x00 }, + { 0x19, 0x71 }, { 0x1B, 0xC4 }, { 0x1C, 0x00 }, { 0x1D, 0x02 }, + { 0x1E, 0x00 }, { 0x1F, 0x00 }, { 0x20, 0x08 }, { 0x21, 0x66 }, + { 0x22, 0xB4 }, { 0x24, 0xC4 }, { 0x25, 0x00 }, { 0x26, 0x02 }, + { 0x27, 0x00 }, { 0x28, 0x00 }, { 0x29, 0x07 }, { 0x2A, 0x66 }, + { 0x2B, 0xB4 }, { 0x2F, 0xC4 }, { 0x30, 0x00 }, { 0x31, 0x04 }, + { 0x32, 0x01 }, { 0x33, 0x00 }, { 0x34, 0x03 }, { 0x35, 0x00 }, + { 0x36, 0x71 }, { 0x38, 0xC4 }, { 0x39, 0x00 }, { 0x3A, 0x04 }, + { 0x3B, 0x01 }, { 0x3D, 0x00 }, { 0x3F, 0x05 }, { 0x40, 0x00 }, + { 0x41, 0x71 }, { 0x83, 0xCE }, { 0x84, 0x02 }, { 0x85, 0x20 }, + { 0x86, 0xDC }, { 0x87, 0x00 }, { 0x88, 0x04 }, { 0x89, 0x00 }, + { 0x8A, 0xBB }, { 0x8B, 0x80 }, { 0xC7, 0x0E }, { 0xC8, 0x05 }, + { 0xC9, 0x1F }, { 0xCA, 0x06 }, { 0xCB, 0x00 }, { 0xCC, 0x03 }, + { 0xCD, 0x04 }, { 0xCE, 0x1F }, { 0xCF, 0x1F }, { 0xD0, 0x1F }, + { 0xD1, 0x1F }, { 0xD2, 0x1F }, { 0xD3, 0x1F }, { 0xD4, 0x1F }, + { 0xD5, 0x1F }, { 0xD6, 0x1F }, { 0xD7, 0x17 }, { 0xD8, 0x1F }, + { 0xD9, 0x16 }, { 0xDA, 0x1F }, { 0xDB, 0x0E }, { 0xDC, 0x01 }, + { 0xDD, 0x1F }, { 0xDE, 0x02 }, { 0xDF, 0x00 }, { 0xE0, 0x03 }, + { 0xE1, 0x04 }, { 0xE2, 0x1F }, { 0xE3, 0x1F }, { 0xE4, 0x1F }, + { 0xE5, 0x1F }, { 0xE6, 0x1F }, { 0xE7, 0x1F }, { 0xE8, 0x1F }, + { 0xE9, 0x1F }, { 0xEA, 0x1F }, { 0xEB, 0x17 }, { 0xEC, 0x1F }, + { 0xED, 0x16 }, { 0xEE, 0x1F }, { 0xEF, 0x03 }, { 0xFE, 0x70 }, + { 0x5A, 0x0B }, { 0x5B, 0x0B }, { 0x5C, 0x55 }, { 0x5D, 0x24 }, + { 0xFE, 0x90 }, { 0x12, 0x24 }, { 0x13, 0x49 }, { 0x14, 0x92 }, + { 0x15, 0x86 }, { 0x16, 0x61 }, { 0x17, 0x18 }, { 0x18, 0x24 }, + { 0x19, 0x49 }, { 0x1A, 0x92 }, { 0x1B, 0x86 }, { 0x1C, 0x61 }, + { 0x1D, 0x18 }, { 0x1E, 0x24 }, { 0x1F, 0x49 }, { 0x20, 0x92 }, + { 0x21, 0x86 }, { 0x22, 0x61 }, { 0x23, 0x18 }, { 0xFE, 0x40 }, + { 0x0E, 0x10 }, { 0xFE, 0xA0 }, { 0x04, 0x80 }, { 0x16, 0x00 }, + { 0x26, 0x10 }, { 0x2F, 0x37 }, { 0xFE, 0xD0 }, { 0x06, 0x0F }, + { 0x4B, 0x00 }, { 0x56, 0x4A }, { 0xFE, 0x00 }, { 0xC2, 0x09 }, + { 0x35, 0x00 }, { 0xFE, 0x70 }, { 0x7D, 0x61 }, { 0x7F, 0x00 }, + { 0x7E, 0x4E }, { 0x52, 0x2C }, { 0x49, 0x00 }, { 0x4A, 0x00 }, + { 0x4B, 0x00 }, { 0x4C, 0x00 }, { 0x4D, 0xE8 }, { 0x4E, 0x25 }, + { 0x4F, 0x6E }, { 0x50, 0xAE }, { 0x51, 0x2F }, { 0xAD, 0xF4 }, + { 0xAE, 0x8F }, { 0xAF, 0x00 }, { 0xB0, 0x54 }, { 0xB1, 0x3A }, + { 0xB2, 0x00 }, { 0xB3, 0x00 }, { 0xB4, 0x00 }, { 0xB5, 0x00 }, + { 0xB6, 0x18 }, { 0xB7, 0x30 }, { 0xB8, 0x4A }, { 0xB9, 0x98 }, + { 0xBA, 0x30 }, { 0xBB, 0x60 }, { 0xBC, 0x50 }, { 0xBD, 0x00 }, + { 0xBE, 0x00 }, { 0xBF, 0x39 }, { 0xFE, 0x00 }, { 0x51, 0x66 }, +}; + static int visionox_rm69299_prepare(struct drm_panel *panel) { struct visionox_rm69299 *ctx = panel_to_ctx(panel); - int ret; + int ret, i; if (ctx->prepared) return 0; @@ -98,34 +245,55 @@ static int visionox_rm69299_prepare(struct drm_panel *panel) ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM; - ret = mipi_dsi_dcs_write_buffer(ctx->dsi, (u8[]) { 0xfe, 0x00 }, 2); - if (ret < 0) { - dev_err(ctx->panel.dev, "cmd set tx 0 failed, ret = %d\n", ret); - goto power_off; - } - - ret = mipi_dsi_dcs_write_buffer(ctx->dsi, (u8[]) { 0xc2, 0x08 }, 2); - if (ret < 0) { - dev_err(ctx->panel.dev, "cmd set tx 1 failed, ret = %d\n", ret); - goto power_off; - } - - ret = mipi_dsi_dcs_write_buffer(ctx->dsi, (u8[]) { 0x35, 0x00 }, 2); - if (ret < 0) { - dev_err(ctx->panel.dev, "cmd set tx 2 failed, ret = %d\n", ret); - goto power_off; - } - - ret = mipi_dsi_dcs_write_buffer(ctx->dsi, (u8[]) { 0x51, 0xff }, 2); - if (ret < 0) { - dev_err(ctx->panel.dev, "cmd set tx 3 failed, ret = %d\n", ret); - goto power_off; + if (ctx->mode == &visionox_rm69299_1080x2160_60hz) { + for (i = 0; i < VISIONOX_RM69299_SHIFT_INIT_SEQ_LEN; i++) { + ret = mipi_dsi_dcs_write_buffer(ctx->dsi, + visionox_rm69299_1080x2248_60hz_init_seq[i], 2); + if (ret < 0) { + dev_err(ctx->panel.dev, + "cmd set tx 0 failed, ret = %d\n", ret); + return ret; + } + } + } else { + ret = mipi_dsi_dcs_write_buffer(ctx->dsi, (u8[]){ 0xfe, 0x00 }, + 2); + if (ret < 0) { + dev_err(ctx->panel.dev, + "cmd set tx 0 failed, ret = %d\n", ret); + return ret; + } + + ret = mipi_dsi_dcs_write_buffer(ctx->dsi, (u8[]){ 0xc2, 0x08 }, + 2); + if (ret < 0) { + dev_err(ctx->panel.dev, + "cmd set tx 1 failed, ret = %d\n", ret); + return ret; + } + + ret = mipi_dsi_dcs_write_buffer(ctx->dsi, (u8[]){ 0x35, 0x00 }, + 2); + if (ret < 0) { + dev_err(ctx->panel.dev, + "cmd set tx 2 failed, ret = %d\n", ret); + return ret; + } + + ret = mipi_dsi_dcs_write_buffer(ctx->dsi, (u8[]){ 0x51, 0xff }, + 2); + if (ret < 0) { + dev_err(ctx->panel.dev, + "cmd set tx 3 failed, ret = %d\n", ret); + return ret; + } } ret = mipi_dsi_dcs_write(ctx->dsi, MIPI_DCS_EXIT_SLEEP_MODE, NULL, 0); if (ret < 0) { - dev_err(ctx->panel.dev, "exit_sleep_mode cmd failed ret = %d\n", ret); - goto power_off; + dev_err(ctx->panel.dev, "exit_sleep_mode cmd failed ret = %d\n", + ret); + return ret; } /* Per DSI spec wait 120ms after sending exit sleep DCS command */ @@ -133,8 +301,9 @@ static int visionox_rm69299_prepare(struct drm_panel *panel) ret = mipi_dsi_dcs_write(ctx->dsi, MIPI_DCS_SET_DISPLAY_ON, NULL, 0); if (ret < 0) { - dev_err(ctx->panel.dev, "set_display_on cmd failed ret = %d\n", ret); - goto power_off; + dev_err(ctx->panel.dev, "set_display_on cmd failed ret = %d\n", + ret); + return ret; } /* Per DSI spec wait 120ms after sending set_display_on DCS command */ @@ -143,41 +312,23 @@ static int visionox_rm69299_prepare(struct drm_panel *panel) ctx->prepared = true; return 0; - -power_off: - return ret; } -static const struct drm_display_mode visionox_rm69299_1080x2248_60hz = { - .name = "1080x2248", - .clock = 158695, - .hdisplay = 1080, - .hsync_start = 1080 + 26, - .hsync_end = 1080 + 26 + 2, - .htotal = 1080 + 26 + 2 + 36, - .vdisplay = 2248, - .vsync_start = 2248 + 56, - .vsync_end = 2248 + 56 + 4, - .vtotal = 2248 + 56 + 4 + 4, - .flags = 0, -}; - static int visionox_rm69299_get_modes(struct drm_panel *panel, struct drm_connector *connector) { struct visionox_rm69299 *ctx = panel_to_ctx(panel); struct drm_display_mode *mode; - mode = drm_mode_create(connector->dev); - if (!mode) { - dev_err(ctx->panel.dev, "failed to create a new display mode\n"); - return 0; - } + mode = drm_mode_duplicate(connector->dev, ctx->mode); + if (!mode) + return -ENOMEM; + + drm_mode_set_name(mode); - connector->display_info.width_mm = 74; - connector->display_info.height_mm = 131; - drm_mode_copy(mode, &visionox_rm69299_1080x2248_60hz); mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; + connector->display_info.width_mm = mode->width_mm; + connector->display_info.height_mm = mode->height_mm; drm_mode_probed_add(connector, mode); return 1; @@ -199,6 +350,8 @@ static int visionox_rm69299_probe(struct mipi_dsi_device *dsi) if (!ctx) return -ENOMEM; + ctx->mode = of_device_get_match_data(dev); + mipi_dsi_set_drvdata(dsi, ctx); ctx->panel.dev = dev; @@ -212,10 +365,11 @@ static int visionox_rm69299_probe(struct mipi_dsi_device *dsi) if (ret < 0) return ret; - ctx->reset_gpio = devm_gpiod_get(ctx->panel.dev, - "reset", GPIOD_OUT_LOW); + ctx->reset_gpio = + devm_gpiod_get(ctx->panel.dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(ctx->reset_gpio)) { - dev_err(dev, "cannot get reset gpio %ld\n", PTR_ERR(ctx->reset_gpio)); + dev_err(dev, "cannot get reset gpio %ld\n", + PTR_ERR(ctx->reset_gpio)); return PTR_ERR(ctx->reset_gpio); } @@ -237,13 +391,17 @@ static int visionox_rm69299_probe(struct mipi_dsi_device *dsi) ret = regulator_set_load(ctx->supplies[0].consumer, 32000); if (ret) { - dev_err(dev, "regulator set load failed for vdda supply ret = %d\n", ret); + dev_err(dev, + "regulator set load failed for vdda supply ret = %d\n", + ret); goto err_set_load; } ret = regulator_set_load(ctx->supplies[1].consumer, 13200); if (ret) { - dev_err(dev, "regulator set load failed for vdd3p3 supply ret = %d\n", ret); + dev_err(dev, + "regulator set load failed for vdd3p3 supply ret = %d\n", + ret); goto err_set_load; } @@ -268,7 +426,10 @@ static int visionox_rm69299_remove(struct mipi_dsi_device *dsi) } static const struct of_device_id visionox_rm69299_of_match[] = { - { .compatible = "visionox,rm69299-1080p-display", }, + { .compatible = "visionox,rm69299-1080p-display", + .data = &visionox_rm69299_1080x2248_60hz }, + { .compatible = "visionox,rm69299-shift", + .data = &visionox_rm69299_1080x2160_60hz }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, visionox_rm69299_of_match);