diff mbox series

[v4,12/16] dt-bindings: clock: add ipq8064 ce5 clk define

Message ID 20220217235703.26641-13-ansuelsmth@gmail.com (mailing list archive)
State Superseded
Headers show
Series Multiple addition and improvement to ipq8064 gcc | expand

Commit Message

Christian Marangi Feb. 17, 2022, 11:56 p.m. UTC
Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
 include/dt-bindings/clock/qcom,gcc-ipq806x.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Bjorn Andersson Feb. 24, 2022, 4:01 a.m. UTC | #1
On Thu 17 Feb 17:56 CST 2022, Ansuel Smith wrote:

> Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver.
> 

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> ---
>  include/dt-bindings/clock/qcom,gcc-ipq806x.h | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> index 7deec14a6dee..02262d2ac899 100644
> --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> @@ -240,7 +240,7 @@
>  #define PLL14					232
>  #define PLL14_VOTE				233
>  #define PLL18					234
> -#define CE5_SRC					235
> +#define CE5_A_CLK				235
>  #define CE5_H_CLK				236
>  #define CE5_CORE_CLK				237
>  #define CE3_SLEEP_CLK				238
> @@ -283,5 +283,8 @@
>  #define EBI2_AON_CLK				281
>  #define NSSTCM_CLK_SRC				282
>  #define NSSTCM_CLK				283

You don't like 284?

Regards,
Bjorn

> +#define CE5_A_CLK_SRC				285
> +#define CE5_H_CLK_SRC				286
> +#define CE5_CORE_CLK_SRC			287
>  
>  #endif
> -- 
> 2.34.1
>
Christian Marangi Feb. 24, 2022, 4:01 p.m. UTC | #2
On Wed, Feb 23, 2022 at 10:01:14PM -0600, Bjorn Andersson wrote:
> On Thu 17 Feb 17:56 CST 2022, Ansuel Smith wrote:
> 
> > Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver.
> > 
> 
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> 
> > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> > ---
> >  include/dt-bindings/clock/qcom,gcc-ipq806x.h | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> > index 7deec14a6dee..02262d2ac899 100644
> > --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> > +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> > @@ -240,7 +240,7 @@
> >  #define PLL14					232
> >  #define PLL14_VOTE				233
> >  #define PLL18					234
> > -#define CE5_SRC					235
> > +#define CE5_A_CLK				235
> >  #define CE5_H_CLK				236
> >  #define CE5_CORE_CLK				237
> >  #define CE3_SLEEP_CLK				238
> > @@ -283,5 +283,8 @@
> >  #define EBI2_AON_CLK				281
> >  #define NSSTCM_CLK_SRC				282
> >  #define NSSTCM_CLK				283
> 
> You don't like 284?
> 
> Regards,
> Bjorn
>

In the QSDK 284 is used for a virtual clk used to scale the NSS core.
I skipped that in case we will implement it and to keep these header
similar across QSDK and linux.

> > +#define CE5_A_CLK_SRC				285
> > +#define CE5_H_CLK_SRC				286
> > +#define CE5_CORE_CLK_SRC			287
> >  
> >  #endif
> > -- 
> > 2.34.1
> >
Bjorn Andersson Feb. 24, 2022, 4:18 p.m. UTC | #3
On Thu 24 Feb 08:01 PST 2022, Ansuel Smith wrote:

> On Wed, Feb 23, 2022 at 10:01:14PM -0600, Bjorn Andersson wrote:
> > On Thu 17 Feb 17:56 CST 2022, Ansuel Smith wrote:
> > 
> > > Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver.
> > > 
> > 
> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > 
> > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> > > ---
> > >  include/dt-bindings/clock/qcom,gcc-ipq806x.h | 5 ++++-
> > >  1 file changed, 4 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> > > index 7deec14a6dee..02262d2ac899 100644
> > > --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> > > +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> > > @@ -240,7 +240,7 @@
> > >  #define PLL14					232
> > >  #define PLL14_VOTE				233
> > >  #define PLL18					234
> > > -#define CE5_SRC					235
> > > +#define CE5_A_CLK				235
> > >  #define CE5_H_CLK				236
> > >  #define CE5_CORE_CLK				237
> > >  #define CE3_SLEEP_CLK				238
> > > @@ -283,5 +283,8 @@
> > >  #define EBI2_AON_CLK				281
> > >  #define NSSTCM_CLK_SRC				282
> > >  #define NSSTCM_CLK				283
> > 
> > You don't like 284?
> > 
> > Regards,
> > Bjorn
> >
> 
> In the QSDK 284 is used for a virtual clk used to scale the NSS core.
> I skipped that in case we will implement it and to keep these header
> similar across QSDK and linux.
> 

Okay, let's take a look at how that virtual clock is implemented once
you get there. But I'm fine with the reasoning for leaving a gap.

Regards,
Bjorn

> > > +#define CE5_A_CLK_SRC				285
> > > +#define CE5_H_CLK_SRC				286
> > > +#define CE5_CORE_CLK_SRC			287
> > >  
> > >  #endif
> > > -- 
> > > 2.34.1
> > > 
> 
> -- 
> 	Ansuel
diff mbox series

Patch

diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
index 7deec14a6dee..02262d2ac899 100644
--- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
@@ -240,7 +240,7 @@ 
 #define PLL14					232
 #define PLL14_VOTE				233
 #define PLL18					234
-#define CE5_SRC					235
+#define CE5_A_CLK				235
 #define CE5_H_CLK				236
 #define CE5_CORE_CLK				237
 #define CE3_SLEEP_CLK				238
@@ -283,5 +283,8 @@ 
 #define EBI2_AON_CLK				281
 #define NSSTCM_CLK_SRC				282
 #define NSSTCM_CLK				283
+#define CE5_A_CLK_SRC				285
+#define CE5_H_CLK_SRC				286
+#define CE5_CORE_CLK_SRC			287
 
 #endif