@@ -18,13 +18,23 @@
static DEFINE_SPINLOCK(krait_clock_reg_lock);
#define LPL_SHIFT 8
+#define SECCLKAGD BIT(4)
+
static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
{
unsigned long flags;
u32 regval;
spin_lock_irqsave(&krait_clock_reg_lock, flags);
+
regval = krait_get_l2_indirect_reg(mux->offset);
+
+ /* apq/ipq8064 Errata: disable sec_src clock gating during switch. */
+ if (mux->disable_sec_src_gating) {
+ regval |= SECCLKAGD;
+ krait_set_l2_indirect_reg(mux->offset, regval);
+ }
+
regval &= ~(mux->mask << mux->shift);
regval |= (sel & mux->mask) << mux->shift;
if (mux->lpl) {
@@ -33,6 +43,12 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
}
krait_set_l2_indirect_reg(mux->offset, regval);
+ /* apq/ipq8064 Errata: re-enabled sec_src clock gating. */
+ if (mux->disable_sec_src_gating) {
+ regval &= ~SECCLKAGD;
+ krait_set_l2_indirect_reg(mux->offset, regval);
+ }
+
/* Wait for switch to complete. */
mb();
udelay(1);
@@ -15,6 +15,7 @@ struct krait_mux_clk {
u8 safe_sel;
u8 old_index;
bool reparent;
+ bool disable_sec_src_gating;
struct clk_hw hw;
struct notifier_block clk_nb;
@@ -157,6 +157,7 @@ krait_add_sec_mux(struct device *dev, struct clk *qsb, int id,
mux->shift = 2;
mux->parent_map = sec_mux_map;
mux->hw.init = &init;
+ mux->disable_sec_src_gating = true;
init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
if (!init.name)
Add apq/ipq8064 errata workaround where the sec_src clock gating needs to be disabled during switching. To enable this set disable_sec_src_gating in the mux struct. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> --- drivers/clk/qcom/clk-krait.c | 16 ++++++++++++++++ drivers/clk/qcom/clk-krait.h | 1 + drivers/clk/qcom/krait-cc.c | 1 + 3 files changed, 18 insertions(+)