| Message ID | 20220416025637.83484-2-y.oudjana@protonmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add support for MSM8996 Pro | expand |
On 16/04/2022 04:56, Yassine Oudjana wrote: > Add CBF clock and reg. > > Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> > Acked-by: Rob Herring <robh@kernel.org> > --- > .../devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml > index a20cb10636dd..325f8aef53b2 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml > @@ -10,8 +10,8 @@ maintainers: > - Loic Poulain <loic.poulain@linaro.org> > > description: | > - Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster > - and clock 1 is for Perf cluster. > + Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster, > + clock 1 is for Perf cluster, and clock 2 is for Coherent bus fabric (CBF). > > properties: > compatible: > @@ -19,7 +19,9 @@ properties: > - qcom,msm8996-apcc > > reg: > - maxItems: 1 > + items: > + - description: Cluster clock registers > + - description: CBF clock registers This breaks the ABI (which might be okay or might be not, but was not mentioned in the commit) and breaks existing DTSes. Please fix them before this patch. Best regards, Krzysztof
On Mon, Apr 18 2022 at 18:04:08 +0200, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > On 16/04/2022 04:56, Yassine Oudjana wrote: >> Add CBF clock and reg. >> >> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> >> Acked-by: Rob Herring <robh@kernel.org> >> --- >> .../devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 10 >> ++++++---- >> 1 file changed, 6 insertions(+), 4 deletions(-) >> >> diff --git >> a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml >> b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml >> index a20cb10636dd..325f8aef53b2 100644 >> --- a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml >> +++ b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml >> @@ -10,8 +10,8 @@ maintainers: >> - Loic Poulain <loic.poulain@linaro.org> >> >> description: | >> - Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for >> Power cluster >> - and clock 1 is for Perf cluster. >> + Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for >> Power cluster, >> + clock 1 is for Perf cluster, and clock 2 is for Coherent bus >> fabric (CBF). >> >> properties: >> compatible: >> @@ -19,7 +19,9 @@ properties: >> - qcom,msm8996-apcc >> >> reg: >> - maxItems: 1 >> + items: >> + - description: Cluster clock registers >> + - description: CBF clock registers > > This breaks the ABI (which might be okay or might be not, but was not > mentioned in the commit) and breaks existing DTSes. Please fix them > before this patch. This is only documenting changes made in an earlier patch[1] this series depends on, and the DTSes are fixed in another patch[2] that is also listed as a dependency in the cover letter (both patches aren't applied yet). Shouldn't the ABI changes should be mentioned in those patches instead? [1] https://lore.kernel.org/linux-arm-msm/20210528192541.1120703-1-konrad.dybcio@somainline.org/ [2] https://lore.kernel.org/linux-arm-msm/20210528192541.1120703-2-konrad.dybcio@somainline.org/
On 18/04/2022 21:12, Yassine Oudjana wrote: > > On Mon, Apr 18 2022 at 18:04:08 +0200, Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: >> On 16/04/2022 04:56, Yassine Oudjana wrote: >>> Add CBF clock and reg. >>> >>> Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> >>> Acked-by: Rob Herring <robh@kernel.org> >>> --- >>> .../devicetree/bindings/clock/qcom,msm8996-apcc.yaml | 10 >>> ++++++---- >>> 1 file changed, 6 insertions(+), 4 deletions(-) >>> >>> diff --git >>> a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml >>> b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml >>> index a20cb10636dd..325f8aef53b2 100644 >>> --- a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml >>> +++ b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml >>> @@ -10,8 +10,8 @@ maintainers: >>> - Loic Poulain <loic.poulain@linaro.org> >>> >>> description: | >>> - Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for >>> Power cluster >>> - and clock 1 is for Perf cluster. >>> + Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for >>> Power cluster, >>> + clock 1 is for Perf cluster, and clock 2 is for Coherent bus >>> fabric (CBF). >>> >>> properties: >>> compatible: >>> @@ -19,7 +19,9 @@ properties: >>> - qcom,msm8996-apcc >>> >>> reg: >>> - maxItems: 1 >>> + items: >>> + - description: Cluster clock registers >>> + - description: CBF clock registers >> >> This breaks the ABI (which might be okay or might be not, but was not >> mentioned in the commit) and breaks existing DTSes. Please fix them >> before this patch. > > This is only documenting changes made in an earlier patch[1] this > series depends on, So this other patch breaks the ABI. Was it accepted? The patch you wrote here should go together with the clock change. > and the DTSes are fixed in another patch[2] that > is also listed as a dependency in the cover letter (both patches > aren't applied yet). Shouldn't the ABI changes should be mentioned in > those patches instead? They should be mentioned in the clock driver or here, because usually they come together. :) Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml index a20cb10636dd..325f8aef53b2 100644 --- a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml @@ -10,8 +10,8 @@ maintainers: - Loic Poulain <loic.poulain@linaro.org> description: | - Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster - and clock 1 is for Perf cluster. + Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster, + clock 1 is for Perf cluster, and clock 2 is for Coherent bus fabric (CBF). properties: compatible: @@ -19,7 +19,9 @@ properties: - qcom,msm8996-apcc reg: - maxItems: 1 + items: + - description: Cluster clock registers + - description: CBF clock registers '#clock-cells': const: 1 @@ -49,6 +51,6 @@ examples: - | kryocc: clock-controller@6400000 { compatible = "qcom,msm8996-apcc"; - reg = <0x6400000 0x90000>; + reg = <0x6400000 0x90000>, <0x09a11000 0x10000>; #clock-cells = <1>; };