| Message ID | 20220429114330.59026-6-robimarko@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/6] clk: qcom: clk-alpha-pll: add support for APSS PLL | expand |
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 5b32d141c7ae..d23b14a8d4b4 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -970,8 +970,9 @@ IRQ_TYPE_LEVEL_HIGH>, /* int_c */ apcs_glb: mailbox@b111000 { compatible = "qcom,ipq8074-apcs-apps-global"; - reg = <0x0b111000 0x1000>; + reg = <0x0b111000 0x6000>; + #clock-cells = <1>; #mbox-cells = <1>; };
APCS now has support for providing the APSS clocks as the child device for IPQ8074, so update the DT node to reflect the expanded register space as well as add #clock-cells property as it now provides the APSS clock that will be used for CPU scaling. Signed-off-by: Robert Marko <robimarko@gmail.com> --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)