diff mbox series

arm64: dts: qcom: msm8994: Fix CPU6/7 reg values

Message ID 20220501184016.64138-1-konrad.dybcio@somainline.org (mailing list archive)
State Queued
Headers show
Series arm64: dts: qcom: msm8994: Fix CPU6/7 reg values | expand

Commit Message

Konrad Dybcio May 1, 2022, 6:40 p.m. UTC
CPU6 and CPU7 were mistakengly pointing to CPU5 reg. Fix it.

Fixes: 02d8091bbca0 ("arm64: dts: qcom: msm8994: Add a proper CPU map")
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
 arch/arm64/boot/dts/qcom/msm8994.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Bjorn Andersson June 27, 2022, 8:02 p.m. UTC | #1
On Sun, 1 May 2022 20:40:16 +0200, Konrad Dybcio wrote:
> CPU6 and CPU7 were mistakengly pointing to CPU5 reg. Fix it.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: msm8994: Fix CPU6/7 reg values
      commit: 47bf59c4755930f616dd90c8c6a85f40a6d347ea

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index 97bf84f856bc..7a6e4f788ec9 100644
--- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
@@ -100,7 +100,7 @@  CPU5: cpu@101 {
 		CPU6: cpu@102 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a57";
-			reg = <0x0 0x101>;
+			reg = <0x0 0x102>;
 			enable-method = "psci";
 			next-level-cache = <&L2_1>;
 		};
@@ -108,7 +108,7 @@  CPU6: cpu@102 {
 		CPU7: cpu@103 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a57";
-			reg = <0x0 0x101>;
+			reg = <0x0 0x103>;
 			enable-method = "psci";
 			next-level-cache = <&L2_1>;
 		};