diff mbox series

[v6,1/3] mtd: nand: raw: qcom_nandc: reorder qcom_nand_host struct

Message ID 20220609132344.17548-2-ansuelsmth@gmail.com (mailing list archive)
State Superseded
Headers show
Series Add support for unprotected spare data page | expand

Commit Message

Christian Marangi June 9, 2022, 1:23 p.m. UTC
Reorder qcom_nand_host to save holes in the struct.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
 drivers/mtd/nand/raw/qcom_nandc.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

Comments

Manivannan Sadhasivam June 9, 2022, 5:07 p.m. UTC | #1
On Thu, Jun 09, 2022 at 03:23:42PM +0200, Ansuel Smith wrote:
> Reorder qcom_nand_host to save holes in the struct.

You forgot to reorder other structs also as I requested :/

Thanks,
Mani

> 
> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> ---
>  drivers/mtd/nand/raw/qcom_nandc.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> index 1a77542c6d67..7fbbd3e7784c 100644
> --- a/drivers/mtd/nand/raw/qcom_nandc.c
> +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> @@ -431,11 +431,12 @@ struct qcom_nand_controller {
>   *				and reserved bytes
>   * @cw_data:			the number of bytes within a codeword protected
>   *				by ECC
> + * @ecc_bytes_hw:		ECC bytes used by controller hardware for this
> + *				chip
> + *
>   * @use_ecc:			request the controller to use ECC for the
>   *				upcoming read/write
>   * @bch_enabled:		flag to tell whether BCH ECC mode is used
> - * @ecc_bytes_hw:		ECC bytes used by controller hardware for this
> - *				chip
>   * @status:			value to be returned if NAND_CMD_STATUS command
>   *				is executed
>   * @last_command:		keeps track of last command on this chip. used
> @@ -452,11 +453,12 @@ struct qcom_nand_host {
>  	int cs;
>  	int cw_size;
>  	int cw_data;
> -	bool use_ecc;
> -	bool bch_enabled;
>  	int ecc_bytes_hw;
>  	int spare_bytes;
>  	int bbm_size;
> +
> +	bool use_ecc;
> +	bool bch_enabled;
>  	u8 status;
>  	int last_command;
>  
> -- 
> 2.36.1
>
Christian Marangi June 9, 2022, 5:10 p.m. UTC | #2
On Thu, Jun 09, 2022 at 10:37:22PM +0530, Manivannan Sadhasivam wrote:
> On Thu, Jun 09, 2022 at 03:23:42PM +0200, Ansuel Smith wrote:
> > Reorder qcom_nand_host to save holes in the struct.
> 
> You forgot to reorder other structs also as I requested :/
> 
> Thanks,
> Mani
>

Mhhh I didn't find obvius hole in other struct.
Think I will pass this with dwarf to better check them. Sorry!
Feel free to point them if you notice obvius hole that I didn't notice.

> > 
> > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> > ---
> >  drivers/mtd/nand/raw/qcom_nandc.c | 10 ++++++----
> >  1 file changed, 6 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> > index 1a77542c6d67..7fbbd3e7784c 100644
> > --- a/drivers/mtd/nand/raw/qcom_nandc.c
> > +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> > @@ -431,11 +431,12 @@ struct qcom_nand_controller {
> >   *				and reserved bytes
> >   * @cw_data:			the number of bytes within a codeword protected
> >   *				by ECC
> > + * @ecc_bytes_hw:		ECC bytes used by controller hardware for this
> > + *				chip
> > + *
> >   * @use_ecc:			request the controller to use ECC for the
> >   *				upcoming read/write
> >   * @bch_enabled:		flag to tell whether BCH ECC mode is used
> > - * @ecc_bytes_hw:		ECC bytes used by controller hardware for this
> > - *				chip
> >   * @status:			value to be returned if NAND_CMD_STATUS command
> >   *				is executed
> >   * @last_command:		keeps track of last command on this chip. used
> > @@ -452,11 +453,12 @@ struct qcom_nand_host {
> >  	int cs;
> >  	int cw_size;
> >  	int cw_data;
> > -	bool use_ecc;
> > -	bool bch_enabled;
> >  	int ecc_bytes_hw;
> >  	int spare_bytes;
> >  	int bbm_size;
> > +
> > +	bool use_ecc;
> > +	bool bch_enabled;
> >  	u8 status;
> >  	int last_command;
> >  
> > -- 
> > 2.36.1
> > 
> 
> -- 
> மணிவண்ணன் சதாசிவம்
Christian Marangi June 13, 2022, 3:14 p.m. UTC | #3
On Thu, Jun 09, 2022 at 10:37:22PM +0530, Manivannan Sadhasivam wrote:
> On Thu, Jun 09, 2022 at 03:23:42PM +0200, Ansuel Smith wrote:
> > Reorder qcom_nand_host to save holes in the struct.
> 
> You forgot to reorder other structs also as I requested :/
> 
> Thanks,
> Mani
>

Hi, I run this commit with pahole tools and it didn't reorder anything
else aside from what i already reordered. Am I missing something here?

> > 
> > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> > ---
> >  drivers/mtd/nand/raw/qcom_nandc.c | 10 ++++++----
> >  1 file changed, 6 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> > index 1a77542c6d67..7fbbd3e7784c 100644
> > --- a/drivers/mtd/nand/raw/qcom_nandc.c
> > +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> > @@ -431,11 +431,12 @@ struct qcom_nand_controller {
> >   *				and reserved bytes
> >   * @cw_data:			the number of bytes within a codeword protected
> >   *				by ECC
> > + * @ecc_bytes_hw:		ECC bytes used by controller hardware for this
> > + *				chip
> > + *
> >   * @use_ecc:			request the controller to use ECC for the
> >   *				upcoming read/write
> >   * @bch_enabled:		flag to tell whether BCH ECC mode is used
> > - * @ecc_bytes_hw:		ECC bytes used by controller hardware for this
> > - *				chip
> >   * @status:			value to be returned if NAND_CMD_STATUS command
> >   *				is executed
> >   * @last_command:		keeps track of last command on this chip. used
> > @@ -452,11 +453,12 @@ struct qcom_nand_host {
> >  	int cs;
> >  	int cw_size;
> >  	int cw_data;
> > -	bool use_ecc;
> > -	bool bch_enabled;
> >  	int ecc_bytes_hw;
> >  	int spare_bytes;
> >  	int bbm_size;
> > +
> > +	bool use_ecc;
> > +	bool bch_enabled;
> >  	u8 status;
> >  	int last_command;
> >  
> > -- 
> > 2.36.1
> > 
> 
> -- 
> மணிவண்ணன் சதாசிவம்
Manivannan Sadhasivam June 14, 2022, 8:55 p.m. UTC | #4
On Thu, Jun 09, 2022 at 07:10:33PM +0200, Ansuel Smith wrote:
> On Thu, Jun 09, 2022 at 10:37:22PM +0530, Manivannan Sadhasivam wrote:
> > On Thu, Jun 09, 2022 at 03:23:42PM +0200, Ansuel Smith wrote:
> > > Reorder qcom_nand_host to save holes in the struct.
> > 
> > You forgot to reorder other structs also as I requested :/
> > 
> > Thanks,
> > Mani
> >
> 
> Mhhh I didn't find obvius hole in other struct.
> Think I will pass this with dwarf to better check them. Sorry!
> Feel free to point them if you notice obvius hole that I didn't notice.
> 

Sorry, I should be explicit. Please rearrange the members in other structs such
that we could avoid holes (in future also). For instance, in
"struct bam_transaction" u32's and bool are mixed in the middle. You could
organize them like,

struct pointer
struct
u32
bool

And this goes same for all other structs as well.

Thanks,
Mani

> > > 
> > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> > > ---
> > >  drivers/mtd/nand/raw/qcom_nandc.c | 10 ++++++----
> > >  1 file changed, 6 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> > > index 1a77542c6d67..7fbbd3e7784c 100644
> > > --- a/drivers/mtd/nand/raw/qcom_nandc.c
> > > +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> > > @@ -431,11 +431,12 @@ struct qcom_nand_controller {
> > >   *				and reserved bytes
> > >   * @cw_data:			the number of bytes within a codeword protected
> > >   *				by ECC
> > > + * @ecc_bytes_hw:		ECC bytes used by controller hardware for this
> > > + *				chip
> > > + *
> > >   * @use_ecc:			request the controller to use ECC for the
> > >   *				upcoming read/write
> > >   * @bch_enabled:		flag to tell whether BCH ECC mode is used
> > > - * @ecc_bytes_hw:		ECC bytes used by controller hardware for this
> > > - *				chip
> > >   * @status:			value to be returned if NAND_CMD_STATUS command
> > >   *				is executed
> > >   * @last_command:		keeps track of last command on this chip. used
> > > @@ -452,11 +453,12 @@ struct qcom_nand_host {
> > >  	int cs;
> > >  	int cw_size;
> > >  	int cw_data;
> > > -	bool use_ecc;
> > > -	bool bch_enabled;
> > >  	int ecc_bytes_hw;
> > >  	int spare_bytes;
> > >  	int bbm_size;
> > > +
> > > +	bool use_ecc;
> > > +	bool bch_enabled;
> > >  	u8 status;
> > >  	int last_command;
> > >  
> > > -- 
> > > 2.36.1
> > > 
> > 
> > -- 
> > மணிவண்ணன் சதாசிவம்
> 
> -- 
> 	Ansuel
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index 1a77542c6d67..7fbbd3e7784c 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -431,11 +431,12 @@  struct qcom_nand_controller {
  *				and reserved bytes
  * @cw_data:			the number of bytes within a codeword protected
  *				by ECC
+ * @ecc_bytes_hw:		ECC bytes used by controller hardware for this
+ *				chip
+ *
  * @use_ecc:			request the controller to use ECC for the
  *				upcoming read/write
  * @bch_enabled:		flag to tell whether BCH ECC mode is used
- * @ecc_bytes_hw:		ECC bytes used by controller hardware for this
- *				chip
  * @status:			value to be returned if NAND_CMD_STATUS command
  *				is executed
  * @last_command:		keeps track of last command on this chip. used
@@ -452,11 +453,12 @@  struct qcom_nand_host {
 	int cs;
 	int cw_size;
 	int cw_data;
-	bool use_ecc;
-	bool bch_enabled;
 	int ecc_bytes_hw;
 	int spare_bytes;
 	int bbm_size;
+
+	bool use_ecc;
+	bool bch_enabled;
 	u8 status;
 	int last_command;