| Message ID | 20220610220259.220622-1-luca@z3ntu.xyz (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | drm/msm/dsi: Use single function for reset | expand |
On 6/10/2022 3:02 PM, Luca Weiss wrote: > From: Vladimir Lypak <vladimir.lypak@gmail.com> > > There is currently two function for performing reset: dsi_sw_reset and > dsi_sw_reset_restore. Only difference betwean those is that latter one betwean --> between > assumes that DSI controller is enabled. In contrary former one assumes > that controller is disabled and executed during power-on. However this > assumtion is not true mobile devices which have boot splash set up by > boot-loader. > > This patch removes dsi_sw_reset_restore and makes dsi_sw_reset disable > DSI controller during reset sequence if it's enabled. > > Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Otherwise, looks good to me, Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > drivers/gpu/drm/msm/dsi/dsi_host.c | 48 +++++++++++++----------------- > 1 file changed, 21 insertions(+), 27 deletions(-) > > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c > index a95d5df52653..bab2634ebd11 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > @@ -1080,12 +1080,32 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) > > static void dsi_sw_reset(struct msm_dsi_host *msm_host) > { > + u32 ctrl; > + > + ctrl = dsi_read(msm_host, REG_DSI_CTRL); > + > + if (ctrl & DSI_CTRL_ENABLE) { > + dsi_write(msm_host, REG_DSI_CTRL, ctrl & ~DSI_CTRL_ENABLE); > + /* > + * dsi controller need to be disabled before > + * clocks turned on > + */ > + wmb(); > + } > + > dsi_write(msm_host, REG_DSI_CLK_CTRL, DSI_CLK_CTRL_ENABLE_CLKS); > wmb(); /* clocks need to be enabled before reset */ > > + /* dsi controller can only be reset while clocks are running */ > dsi_write(msm_host, REG_DSI_RESET, 1); > msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ > dsi_write(msm_host, REG_DSI_RESET, 0); > + wmb(); /* controller out of reset */ > + > + if (ctrl & DSI_CTRL_ENABLE) { > + dsi_write(msm_host, REG_DSI_CTRL, ctrl); > + wmb(); /* make sure dsi controller enabled again */ > + } > } > > static void dsi_op_mode_config(struct msm_dsi_host *msm_host, > @@ -1478,32 +1498,6 @@ static int dsi_cmds2buf_tx(struct msm_dsi_host *msm_host, > return len; > } > > -static void dsi_sw_reset_restore(struct msm_dsi_host *msm_host) > -{ > - u32 data0, data1; > - > - data0 = dsi_read(msm_host, REG_DSI_CTRL); > - data1 = data0; > - data1 &= ~DSI_CTRL_ENABLE; > - dsi_write(msm_host, REG_DSI_CTRL, data1); > - /* > - * dsi controller need to be disabled before > - * clocks turned on > - */ > - wmb(); > - > - dsi_write(msm_host, REG_DSI_CLK_CTRL, DSI_CLK_CTRL_ENABLE_CLKS); > - wmb(); /* make sure clocks enabled */ > - > - /* dsi controller can only be reset while clocks are running */ > - dsi_write(msm_host, REG_DSI_RESET, 1); > - msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ > - dsi_write(msm_host, REG_DSI_RESET, 0); > - wmb(); /* controller out of reset */ > - dsi_write(msm_host, REG_DSI_CTRL, data0); > - wmb(); /* make sure dsi controller enabled again */ > -} > - > static void dsi_hpd_worker(struct work_struct *work) > { > struct msm_dsi_host *msm_host = > @@ -1520,7 +1514,7 @@ static void dsi_err_worker(struct work_struct *work) > > pr_err_ratelimited("%s: status=%x\n", __func__, status); > if (status & DSI_ERR_STATE_MDP_FIFO_UNDERFLOW) > - dsi_sw_reset_restore(msm_host); > + dsi_sw_reset(msm_host); > > /* It is safe to clear here because error irq is disabled. */ > msm_host->err_work_state = 0;
On 11/06/2022 01:02, Luca Weiss wrote: > From: Vladimir Lypak <vladimir.lypak@gmail.com> > > There is currently two function for performing reset: dsi_sw_reset and > dsi_sw_reset_restore. Only difference betwean those is that latter one > assumes that DSI controller is enabled. In contrary former one assumes > that controller is disabled and executed during power-on. However this > assumtion is not true mobile devices which have boot splash set up by > boot-loader. > > This patch removes dsi_sw_reset_restore and makes dsi_sw_reset disable > DSI controller during reset sequence if it's enabled. > > Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/gpu/drm/msm/dsi/dsi_host.c | 48 +++++++++++++----------------- > 1 file changed, 21 insertions(+), 27 deletions(-) > > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c > index a95d5df52653..bab2634ebd11 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > @@ -1080,12 +1080,32 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) > > static void dsi_sw_reset(struct msm_dsi_host *msm_host) > { > + u32 ctrl; > + > + ctrl = dsi_read(msm_host, REG_DSI_CTRL); > + > + if (ctrl & DSI_CTRL_ENABLE) { > + dsi_write(msm_host, REG_DSI_CTRL, ctrl & ~DSI_CTRL_ENABLE); > + /* > + * dsi controller need to be disabled before > + * clocks turned on > + */ > + wmb(); > + } > + > dsi_write(msm_host, REG_DSI_CLK_CTRL, DSI_CLK_CTRL_ENABLE_CLKS); > wmb(); /* clocks need to be enabled before reset */ > > + /* dsi controller can only be reset while clocks are running */ > dsi_write(msm_host, REG_DSI_RESET, 1); > msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ > dsi_write(msm_host, REG_DSI_RESET, 0); > + wmb(); /* controller out of reset */ > + > + if (ctrl & DSI_CTRL_ENABLE) { > + dsi_write(msm_host, REG_DSI_CTRL, ctrl); > + wmb(); /* make sure dsi controller enabled again */ > + } > } > > static void dsi_op_mode_config(struct msm_dsi_host *msm_host, > @@ -1478,32 +1498,6 @@ static int dsi_cmds2buf_tx(struct msm_dsi_host *msm_host, > return len; > } > > -static void dsi_sw_reset_restore(struct msm_dsi_host *msm_host) > -{ > - u32 data0, data1; > - > - data0 = dsi_read(msm_host, REG_DSI_CTRL); > - data1 = data0; > - data1 &= ~DSI_CTRL_ENABLE; > - dsi_write(msm_host, REG_DSI_CTRL, data1); > - /* > - * dsi controller need to be disabled before > - * clocks turned on > - */ > - wmb(); > - > - dsi_write(msm_host, REG_DSI_CLK_CTRL, DSI_CLK_CTRL_ENABLE_CLKS); > - wmb(); /* make sure clocks enabled */ > - > - /* dsi controller can only be reset while clocks are running */ > - dsi_write(msm_host, REG_DSI_RESET, 1); > - msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ > - dsi_write(msm_host, REG_DSI_RESET, 0); > - wmb(); /* controller out of reset */ > - dsi_write(msm_host, REG_DSI_CTRL, data0); > - wmb(); /* make sure dsi controller enabled again */ > -} > - > static void dsi_hpd_worker(struct work_struct *work) > { > struct msm_dsi_host *msm_host = > @@ -1520,7 +1514,7 @@ static void dsi_err_worker(struct work_struct *work) > > pr_err_ratelimited("%s: status=%x\n", __func__, status); > if (status & DSI_ERR_STATE_MDP_FIFO_UNDERFLOW) > - dsi_sw_reset_restore(msm_host); > + dsi_sw_reset(msm_host); > > /* It is safe to clear here because error irq is disabled. */ > msm_host->err_work_state = 0;
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index a95d5df52653..bab2634ebd11 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -1080,12 +1080,32 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) static void dsi_sw_reset(struct msm_dsi_host *msm_host) { + u32 ctrl; + + ctrl = dsi_read(msm_host, REG_DSI_CTRL); + + if (ctrl & DSI_CTRL_ENABLE) { + dsi_write(msm_host, REG_DSI_CTRL, ctrl & ~DSI_CTRL_ENABLE); + /* + * dsi controller need to be disabled before + * clocks turned on + */ + wmb(); + } + dsi_write(msm_host, REG_DSI_CLK_CTRL, DSI_CLK_CTRL_ENABLE_CLKS); wmb(); /* clocks need to be enabled before reset */ + /* dsi controller can only be reset while clocks are running */ dsi_write(msm_host, REG_DSI_RESET, 1); msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ dsi_write(msm_host, REG_DSI_RESET, 0); + wmb(); /* controller out of reset */ + + if (ctrl & DSI_CTRL_ENABLE) { + dsi_write(msm_host, REG_DSI_CTRL, ctrl); + wmb(); /* make sure dsi controller enabled again */ + } } static void dsi_op_mode_config(struct msm_dsi_host *msm_host, @@ -1478,32 +1498,6 @@ static int dsi_cmds2buf_tx(struct msm_dsi_host *msm_host, return len; } -static void dsi_sw_reset_restore(struct msm_dsi_host *msm_host) -{ - u32 data0, data1; - - data0 = dsi_read(msm_host, REG_DSI_CTRL); - data1 = data0; - data1 &= ~DSI_CTRL_ENABLE; - dsi_write(msm_host, REG_DSI_CTRL, data1); - /* - * dsi controller need to be disabled before - * clocks turned on - */ - wmb(); - - dsi_write(msm_host, REG_DSI_CLK_CTRL, DSI_CLK_CTRL_ENABLE_CLKS); - wmb(); /* make sure clocks enabled */ - - /* dsi controller can only be reset while clocks are running */ - dsi_write(msm_host, REG_DSI_RESET, 1); - msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ - dsi_write(msm_host, REG_DSI_RESET, 0); - wmb(); /* controller out of reset */ - dsi_write(msm_host, REG_DSI_CTRL, data0); - wmb(); /* make sure dsi controller enabled again */ -} - static void dsi_hpd_worker(struct work_struct *work) { struct msm_dsi_host *msm_host = @@ -1520,7 +1514,7 @@ static void dsi_err_worker(struct work_struct *work) pr_err_ratelimited("%s: status=%x\n", __func__, status); if (status & DSI_ERR_STATE_MDP_FIFO_UNDERFLOW) - dsi_sw_reset_restore(msm_host); + dsi_sw_reset(msm_host); /* It is safe to clear here because error irq is disabled. */ msm_host->err_work_state = 0;