| Message ID | 20220617144714.817765-8-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | clk: qcom: gcc-msm8916: modernize the driver | expand |
Hi Dmitry, Thanks for cleaning up MSM8916! :) On Fri, Jun 17, 2022 at 05:47:14PM +0300, Dmitry Baryshkov wrote: > As we are converting this platform to use DT clock bindings, add clocks > and clock-names properties to the MMCC device tree node. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > arch/arm64/boot/dts/qcom/msm8916.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > index 05472510e29d..e905415b3456 100644 > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > @@ -934,6 +934,20 @@ gcc: clock-controller@1800000 { > #reset-cells = <1>; > #power-domain-cells = <1>; > reg = <0x01800000 0x80000>; > + clocks = <&rpmcc RPM_SMD_BB_CLK1_PIN>, This should be <&xo_board> to avoid functional changes. If we want to change this to the actual votable clock later this should probably be <&rpmcc RPM_SMD_XO_CLK_SRC>. AFAIK that clock exists in RPM on MSM8916 but was never added to the clk-smd-rpm driver (for MSM8916). Not sure where the pin-controlled BB_CLK1 is coming from here. :) Thanks, Stephan
On Fri, 17 Jun 2022 at 20:14, Stephan Gerhold <stephan@gerhold.net> wrote: > > Hi Dmitry, > > Thanks for cleaning up MSM8916! :) > > On Fri, Jun 17, 2022 at 05:47:14PM +0300, Dmitry Baryshkov wrote: > > As we are converting this platform to use DT clock bindings, add clocks > > and clock-names properties to the MMCC device tree node. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/msm8916.dtsi | 14 ++++++++++++++ > > 1 file changed, 14 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > > index 05472510e29d..e905415b3456 100644 > > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > > @@ -934,6 +934,20 @@ gcc: clock-controller@1800000 { > > #reset-cells = <1>; > > #power-domain-cells = <1>; > > reg = <0x01800000 0x80000>; > > + clocks = <&rpmcc RPM_SMD_BB_CLK1_PIN>, > > This should be <&xo_board> to avoid functional changes. Ack, thanks for the suggestion. > > If we want to change this to the actual votable clock later this should > probably be <&rpmcc RPM_SMD_XO_CLK_SRC>. AFAIK that clock exists in RPM > on MSM8916 but was never added to the clk-smd-rpm driver (for MSM8916). > > Not sure where the pin-controlled BB_CLK1 is coming from here. :) It came from the schematics I had at hand (db410c). It uses the BB_CLK1 together with the enable pin. I'll probably use xo_board for now and postpone changing this to rpmcc clock until the next attempt to read msm-3.x code.
On Fri, Jun 17, 2022 at 11:34:24PM +0300, Dmitry Baryshkov wrote: > On Fri, 17 Jun 2022 at 20:14, Stephan Gerhold <stephan@gerhold.net> wrote: > > > > If we want to change this to the actual votable clock later this should > > probably be <&rpmcc RPM_SMD_XO_CLK_SRC>. AFAIK that clock exists in RPM > > on MSM8916 but was never added to the clk-smd-rpm driver (for MSM8916). > > > > Not sure where the pin-controlled BB_CLK1 is coming from here. :) > > It came from the schematics I had at hand (db410c). It uses the > BB_CLK1 together with the enable pin. I'll probably use xo_board for > now and postpone changing this to rpmcc clock until the next attempt > to read msm-3.x code. > Hmm, you're right - BB_CLK1 goes to CXO on most MSM8916+PM8916 devices. I think the msm-3.10 kernel still controls it via the RPM_SMD_XO_CLK_SRC though. Quite confusing. :) Thanks, Stephan
On Sat, 18 Jun 2022 at 16:02, Stephan Gerhold <stephan@gerhold.net> wrote: > > On Fri, Jun 17, 2022 at 11:34:24PM +0300, Dmitry Baryshkov wrote: > > On Fri, 17 Jun 2022 at 20:14, Stephan Gerhold <stephan@gerhold.net> wrote: > > > > > > If we want to change this to the actual votable clock later this should > > > probably be <&rpmcc RPM_SMD_XO_CLK_SRC>. AFAIK that clock exists in RPM > > > on MSM8916 but was never added to the clk-smd-rpm driver (for MSM8916). > > > > > > Not sure where the pin-controlled BB_CLK1 is coming from here. :) > > > > It came from the schematics I had at hand (db410c). It uses the > > BB_CLK1 together with the enable pin. I'll probably use xo_board for > > now and postpone changing this to rpmcc clock until the next attempt > > to read msm-3.x code. > > > > Hmm, you're right - BB_CLK1 goes to CXO on most MSM8916+PM8916 devices. > I think the msm-3.10 kernel still controls it via the RPM_SMD_XO_CLK_SRC > though. Quite confusing. :) I will take a look. Thank you for noticing this.
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 05472510e29d..e905415b3456 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -934,6 +934,20 @@ gcc: clock-controller@1800000 { #reset-cells = <1>; #power-domain-cells = <1>; reg = <0x01800000 0x80000>; + clocks = <&rpmcc RPM_SMD_BB_CLK1_PIN>, + <&sleep_clk>, + <&dsi_phy0 1>, + <&dsi_phy0 0>, + <0>, + <0>, + <0>; + clock-names = "xo", + "sleep_clk", + "dsi0pll", + "dsi0pllbyte", + "ext_mclk", + "ext_pri_i2s", + "ext_sec_i2s"; }; tcsr_mutex: hwlock@1905000 {
As we are converting this platform to use DT clock bindings, add clocks and clock-names properties to the MMCC device tree node. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+)