| Message ID | 20220620071936.1558906-4-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | edb8e38ca99f198b59c967c9e26719198cea8bf8 |
| Headers | show |
| Series | arm64: dts: qcom: msm8996: add missing clock sources | expand |
On 20/06/2022 09:19, Dmitry Baryshkov wrote: > Add missing GCC clock sources. This includes PCIe and USB PIPE and UFS > symbol clocks. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > arch/arm64/boot/dts/qcom/msm8996.dtsi | 18 ++++++++++++++++-- > 1 file changed, 16 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > index e97f193aefd3..6c7380f86383 100644 > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > @@ -689,8 +689,22 @@ gcc: clock-controller@300000 { > > clocks = <&rpmcc RPM_SMD_BB_CLK1>, > <&rpmcc RPM_SMD_LN_BB_CLK>, > - <&sleep_clk>; > - clock-names = "cxo", "cxo2", "sleep_clk"; > + <&sleep_clk>, > + <&pciephy_0>, > + <&pciephy_1>, > + <&pciephy_2>, > + <&ssusb_phy_0>, > + <0>, <0>, <0>; Since the clocks are optional, there is no need to pass <0> to them. I think it does not bring any benefits. > + clock-names = "cxo", > + "cxo2", > + "sleep_clk", > + "pcie_0_pipe_clk_src", > + "pcie_1_pipe_clk_src", > + "pcie_2_pipe_clk_src", > + "usb3_phy_pipe_clk_src", > + "ufs_rx_symbol_0_clk_src", > + "ufs_rx_symbol_1_clk_src", > + "ufs_tx_symbol_0_clk_src"; > }; > > tsens0: thermal-sensor@4a9000 { Best regards, Krzysztof
On Mon, 20 Jun 2022 at 14:24, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 20/06/2022 09:19, Dmitry Baryshkov wrote: > > Add missing GCC clock sources. This includes PCIe and USB PIPE and UFS > > symbol clocks. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/msm8996.dtsi | 18 ++++++++++++++++-- > > 1 file changed, 16 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > index e97f193aefd3..6c7380f86383 100644 > > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > @@ -689,8 +689,22 @@ gcc: clock-controller@300000 { > > > > clocks = <&rpmcc RPM_SMD_BB_CLK1>, > > <&rpmcc RPM_SMD_LN_BB_CLK>, > > - <&sleep_clk>; > > - clock-names = "cxo", "cxo2", "sleep_clk"; > > + <&sleep_clk>, > > + <&pciephy_0>, > > + <&pciephy_1>, > > + <&pciephy_2>, > > + <&ssusb_phy_0>, > > + <0>, <0>, <0>; > > Since the clocks are optional, there is no need to pass <0> to them. I > think it does not bring any benefits. It serves as a reminder that they should be filled with the proper sources. We do the same thing for DSI/DP clocks where the PHY is not yet supported, but the GCC lists them. I had to mark them as optional so that the existing schema files pass validation. Otherwise they would be in the 'required' part. > > > + clock-names = "cxo", > > + "cxo2", > > + "sleep_clk", > > + "pcie_0_pipe_clk_src", > > + "pcie_1_pipe_clk_src", > > + "pcie_2_pipe_clk_src", > > + "usb3_phy_pipe_clk_src", > > + "ufs_rx_symbol_0_clk_src", > > + "ufs_rx_symbol_1_clk_src", > > + "ufs_tx_symbol_0_clk_src"; > > }; > > > > tsens0: thermal-sensor@4a9000 { > > > Best regards, > Krzysztof
On 20/06/2022 13:27, Dmitry Baryshkov wrote: > On Mon, 20 Jun 2022 at 14:24, Krzysztof Kozlowski > <krzysztof.kozlowski@linaro.org> wrote: >> >> On 20/06/2022 09:19, Dmitry Baryshkov wrote: >>> Add missing GCC clock sources. This includes PCIe and USB PIPE and UFS >>> symbol clocks. >>> >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >>> --- >>> arch/arm64/boot/dts/qcom/msm8996.dtsi | 18 ++++++++++++++++-- >>> 1 file changed, 16 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi >>> index e97f193aefd3..6c7380f86383 100644 >>> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi >>> @@ -689,8 +689,22 @@ gcc: clock-controller@300000 { >>> >>> clocks = <&rpmcc RPM_SMD_BB_CLK1>, >>> <&rpmcc RPM_SMD_LN_BB_CLK>, >>> - <&sleep_clk>; >>> - clock-names = "cxo", "cxo2", "sleep_clk"; >>> + <&sleep_clk>, >>> + <&pciephy_0>, >>> + <&pciephy_1>, >>> + <&pciephy_2>, >>> + <&ssusb_phy_0>, >>> + <0>, <0>, <0>; >> >> Since the clocks are optional, there is no need to pass <0> to them. I >> think it does not bring any benefits. > > It serves as a reminder that they should be filled with the proper > sources. We do the same thing for DSI/DP clocks where the PHY is not > yet supported, but the GCC lists them. > > I had to mark them as optional so that the existing schema files pass > validation. Otherwise they would be in the 'required' part. > Hm, ok. Let's hope someone will actually remember to fill these in once there is proper clock. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index e97f193aefd3..6c7380f86383 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -689,8 +689,22 @@ gcc: clock-controller@300000 { clocks = <&rpmcc RPM_SMD_BB_CLK1>, <&rpmcc RPM_SMD_LN_BB_CLK>, - <&sleep_clk>; - clock-names = "cxo", "cxo2", "sleep_clk"; + <&sleep_clk>, + <&pciephy_0>, + <&pciephy_1>, + <&pciephy_2>, + <&ssusb_phy_0>, + <0>, <0>, <0>; + clock-names = "cxo", + "cxo2", + "sleep_clk", + "pcie_0_pipe_clk_src", + "pcie_1_pipe_clk_src", + "pcie_2_pipe_clk_src", + "usb3_phy_pipe_clk_src", + "ufs_rx_symbol_0_clk_src", + "ufs_rx_symbol_1_clk_src", + "ufs_tx_symbol_0_clk_src"; }; tsens0: thermal-sensor@4a9000 {
Add missing GCC clock sources. This includes PCIe and USB PIPE and UFS symbol clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-)