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[93.42.70.190]) by smtp.googlemail.com with ESMTPSA id u17-20020a056402111100b0043a6e807febsm6915464edv.46.2022.07.06.18.10.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 18:10:04 -0700 (PDT) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi , Jonathan McDowell Subject: [PATCH v2 1/8] ARM: dts: qcom: add multiple missing pin definition for ipq8064 Date: Thu, 7 Jul 2022 03:09:35 +0200 Message-Id: <20220707010943.20857-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220707010943.20857-1-ansuelsmth@gmail.com> References: <20220707010943.20857-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add missing definition for mdio0 pins used for gpio-bitbang driver,i2c4 pins and rgmii2 pins for ipq8064. Drop i2c4_pins node from ipq8064-ap148 dts as it's now moved to ipq8064 dtsi. Drop mdio0_pins node from ipq8064-rb3011 dts as it's now moved to ipq8064 dtsi. Signed-off-by: Christian Marangi Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 6 ----- arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 9 ------- arch/arm/boot/dts/qcom-ipq8064.dtsi | 32 +++++++++++++++++++++++ 3 files changed, 32 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts index b63d01d10189..a654d3c22c4f 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts @@ -7,12 +7,6 @@ / { soc { pinmux@800000 { - i2c4_pins: i2c4_pinmux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - bias-disable; - }; - buttons_pins: buttons_pins { mux { pins = "gpio54", "gpio65"; diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts index 9034f00f2bd8..5a65cce2500c 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts @@ -307,15 +307,6 @@ mux { }; }; - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - }; - mdio1_pins: mdio1_pins { mux { pins = "gpio10", "gpio11"; diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 4b475d98343c..bc9987c841d0 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -382,6 +382,13 @@ mux { }; }; + i2c4_pins: i2c4-default { + pins = "gpio12", "gpio13"; + function = "gsbi4"; + drive-strength = <12>; + bias-disable; + }; + spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; @@ -424,6 +431,8 @@ mux { pullups { pins = "gpio39"; + function = "nand"; + drive-strength = <10>; bias-pull-up; }; @@ -431,9 +440,32 @@ hold { pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47"; + function = "nand"; + drive-strength = <10>; bias-bus-hold; }; }; + + mdio0_pins: mdio0-pins { + mux { + pins = "gpio0", "gpio1"; + function = "mdio"; + drive-strength = <8>; + bias-disable; + }; + }; + + rgmii2_pins: rgmii2-pins { + mux { + pins = "gpio27", "gpio28", "gpio29", + "gpio30", "gpio31", "gpio32", + "gpio51", "gpio52", "gpio59", + "gpio60", "gpio61", "gpio62"; + function = "rgmii2"; + drive-strength = <8>; + bias-disable; + }; + }; }; intc: interrupt-controller@2000000 {