From patchwork Thu Aug 25 09:50:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12954452 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74985C48BE4 for ; Thu, 25 Aug 2022 09:54:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239686AbiHYJyA (ORCPT ); Thu, 25 Aug 2022 05:54:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239596AbiHYJxc (ORCPT ); Thu, 25 Aug 2022 05:53:32 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6D418ABF07 for ; Thu, 25 Aug 2022 02:51:30 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id bx38so18866703ljb.10 for ; Thu, 25 Aug 2022 02:51:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=AnOiI4lCKkkAGpKT600Gp4Nhc+hErvdpb/jUGyKfm9c=; b=QXG9VrobunyyUAMSo6k97zFC6cQuxdKWgYn2wob73aGbrLh1/SBsQ114dvc9zagtrI uTCbyN3+qqmm6rIg2AmewTXPWj1+6l1aP9xmHu3kcIN5h8eUNpUWwwyJzZiU3gR7OiB8 jgx3rAcDP6+kQ2Z1imlBrzosifskBWIyP0LRTtHTmfq1v0ejlEfsTigaEpn6BKE+DuAl 4W/jhT+O0hMH3DyvDHILhXEtoOFeMkQZKJMxvWY1DsuctdLxMOIWYKL5q6E4bOrdBMJF 5M6+SNHZSO+Wn5+qM5FnqtL0QLSuY7Mb7bUmqtfwYyhYdrm4Ti0XRgwhXGzQ70Jt00ok oa+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=AnOiI4lCKkkAGpKT600Gp4Nhc+hErvdpb/jUGyKfm9c=; b=a2tXbKYUXRPEHSkIfUw75nlIDzHIvhW+ch4lRwbJnwk+1CuJgHVUdIS+OE8MLv0oi4 bh9QJS949IRgIrE++Qaoi4L8J3LJXSbR0lUuQORUamRozhlJg24ugcqFgycizLAUERQj YtH2zT+KPwa9IYZ13kiWxBxrOoHq2BWPUk+Pl8fr5YccWtVLrGUq7bzxdlf6wSWI6Uji pgJB3y0SwXAGeeThT+tgaAd0wCoddFpWeY7ZYuxf7OQmnF1HcPZ8KGmwkol3HMHdrBlz kszI0uGdFlIfidQIQtOncMeIZ4GOdZOBUMlxMUOFn4qL6dFh0rcPs2XifYgUHUOd6at4 auLQ== X-Gm-Message-State: ACgBeo3BPRwzrcE0CJIAZmADuPR15+sZekI6bAGzGrgp32P5fSceI6p4 TOw5Z9RZ1ImJexXfBioCUjua5g== X-Google-Smtp-Source: AA6agR50l4e+jUR87LYZEeZPmJZKUYt6638NJbYjSZhfOYnEnBBtkOFu806Mkx+f6916VNXBDRVBQA== X-Received: by 2002:a2e:5d5:0:b0:261:d1ee:6941 with SMTP id 204-20020a2e05d5000000b00261d1ee6941mr905986ljf.137.1661421070584; Thu, 25 Aug 2022 02:51:10 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h10-20020a056512220a00b00492cfecf1c0sm398502lfu.245.2022.08.25.02.51.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Aug 2022 02:51:10 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Clark , Sean Paul , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Rob Herring Subject: [PATCH v4 06/10] dt-bindings: display/msm: move qcom,msm8998-mdss schema to mdss.yaml Date: Thu, 25 Aug 2022 12:50:59 +0300 Message-Id: <20220825095103.624891-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220825095103.624891-1-dmitry.baryshkov@linaro.org> References: <20220825095103.624891-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Move schema for qcom,msm8998-mdss from dpu-msm8998.yaml to mdss.yaml so that the dpu file describes only the DPU schema. Reviewed-by: Rob Herring Signed-off-by: Dmitry Baryshkov --- .../bindings/display/msm/dpu-msm8998.yaml | 142 +++++------------- .../devicetree/bindings/display/msm/mdss.yaml | 49 ++++++ 2 files changed, 89 insertions(+), 102 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml index 2df64afb76e6..5caf46a1dd88 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml @@ -10,142 +10,80 @@ maintainers: - AngeloGioacchino Del Regno description: | - Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates - sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree - bindings of MDSS and DPU are mentioned for MSM8998 target. + Device tree bindings for the DPU display controller for MSM8998 target. properties: compatible: items: - - const: qcom,msm8998-mdss + - const: qcom,msm8998-dpu reg: - maxItems: 1 + items: + - description: Address offset and size for mdp register set + - description: Address offset and size for regdma register set + - description: Address offset and size for vbif register set + - description: Address offset and size for non-realtime vbif register set reg-names: - const: mdss - - power-domains: - maxItems: 1 + items: + - const: mdp + - const: regdma + - const: vbif + - const: vbif_nrt clocks: items: - - description: Display AHB clock - - description: Display AXI clock + - description: Display ahb clock + - description: Display axi clock + - description: Display mem-noc clock - description: Display core clock + - description: Display vsync clock clock-names: items: - const: iface - const: bus + - const: mnoc - const: core + - const: vsync interrupts: maxItems: 1 - interrupt-controller: true - - "#address-cells": true - - "#size-cells": true - - "#interrupt-cells": - const: 1 - - iommus: - items: - - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0 - - ranges: true + power-domains: + maxItems: 1 -patternProperties: - "^display-controller@[0-9a-f]+$": - type: object - description: Node containing the properties of DPU. + operating-points-v2: true + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: | + Contains the list of output ports from DPU device. These ports + connect to interfaces that are external to the DPU hardware, + such as DSI, DP etc. Each output port contains an endpoint that + describes how it is connected to an external interface. properties: - compatible: - items: - - const: qcom,msm8998-dpu - - reg: - items: - - description: Address offset and size for mdp register set - - description: Address offset and size for regdma register set - - description: Address offset and size for vbif register set - - description: Address offset and size for non-realtime vbif register set - - reg-names: - items: - - const: mdp - - const: regdma - - const: vbif - - const: vbif_nrt - - clocks: - items: - - description: Display ahb clock - - description: Display axi clock - - description: Display mem-noc clock - - description: Display core clock - - description: Display vsync clock - - clock-names: - items: - - const: iface - - const: bus - - const: mnoc - - const: core - - const: vsync - - interrupts: - maxItems: 1 - - power-domains: - maxItems: 1 - - operating-points-v2: true - ports: - $ref: /schemas/graph.yaml#/properties/ports - description: | - Contains the list of output ports from DPU device. These ports - connect to interfaces that are external to the DPU hardware, - such as DSI, DP etc. Each output port contains an endpoint that - describes how it is connected to an external interface. - - properties: - port@0: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF1 (DSI1) - - port@1: - $ref: /schemas/graph.yaml#/properties/port - description: DPU_INTF2 (DSI2) - - required: - - port@0 - - port@1 + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: DPU_INTF1 (DSI1) + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: DPU_INTF2 (DSI2) required: - - compatible - - reg - - reg-names - - clocks - - interrupts - - power-domains - - operating-points-v2 - - ports + - port@0 + - port@1 required: - compatible - reg - reg-names - - power-domains - clocks - interrupts - - interrupt-controller - - iommus - - ranges + - power-domains + - operating-points-v2 + - ports additionalProperties: false diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml index 0c6d68f2a450..1b469893732a 100644 --- a/Documentation/devicetree/bindings/display/msm/mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml @@ -18,6 +18,7 @@ properties: compatible: enum: - qcom,mdss + - qcom,msm8998-mdss - qcom,qcm2290-mdss - qcom,sc7180-mdss - qcom,sc7280-mdss @@ -143,6 +144,28 @@ allOf: required: - iommus + - if: + properties: + compatible: + contains: + const: qcom,msm8998-mdss + then: + properties: + clocks: + items: + - description: Display AHB clock + - description: Display AXI clock + - description: Display core clock + + clock-names: + items: + - const: iface + - const: bus + - const: core + + iommus: + maxItems: 1 + - if: properties: compatible: @@ -262,6 +285,32 @@ allOf: - qcom,hdmi-tx-8994 - qcom,hdmi-tx-8996 + - if: + properties: + compatible: + contains: + const: qcom,msm8998-mdss + then: + patternProperties: + "^display-controller@[1-9a-f][0-9a-f]*$": + type: object + properties: + compatible: + const: qcom,msm8998-dpu + + "^dsi@[1-9a-f][0-9a-f]*$": + type: object + properties: + compatible: + const: qcom,mdss-dsi-ctrl + + "^phy@[1-9a-f][0-9a-f]*$": + type: object + properties: + compatible: + enum: + - qcom,dsi-phy-14nm + - if: properties: compatible: