From patchwork Wed Sep 7 11:07:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12968848 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6377DC6FA8B for ; Wed, 7 Sep 2022 11:08:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230162AbiIGLID (ORCPT ); Wed, 7 Sep 2022 07:08:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230062AbiIGLH5 (ORCPT ); Wed, 7 Sep 2022 07:07:57 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E014A3D6B; Wed, 7 Sep 2022 04:07:54 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 2F464B81C4E; Wed, 7 Sep 2022 11:07:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9B7CBC4314E; Wed, 7 Sep 2022 11:07:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1662548868; bh=0amttqEto7nuzemuoVK0sV/cR99Pk94dN9n5WbK/ABM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Htso2rnh9LSMUo2OOizi7Do8bL3ruQKkiAPFa0M9pTROq3U9krxTqBQ2Iz842uf5U 0Du3t8mloocVH+2eoN3t6xPWtGL5GXVsyym8hY6BEE3+3XmDHS8JbNyzQ1ualcFEqs ZUA9TxkyOgFAr6kLjUCt+7kdKwznt1nRuMzNRYtcBZG8GzkxqTm2A1TUNl/bJ6/v96 NJvl2UjumQj9XDtjW7LMMqLGI/zzPcueNsfGmMQ+zqsAx9A+0BxTn6LQQ0qFLA2yN+ XqE5MlC5k+XXY4pog+Q6dLn4tHEwVRxVFS6nuay7KH0Er7TIK5t/iFA8WG7BmSKHei uj8sC+gm/MepQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oVsuO-0004yw-CS; Wed, 07 Sep 2022 13:07:52 +0200 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Kishon Vijay Abraham I , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 04/16] phy: qcom-qmp-pcie: drop unused defines Date: Wed, 7 Sep 2022 13:07:16 +0200 Message-Id: <20220907110728.19092-5-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220907110728.19092-1-johan+linaro@kernel.org> References: <20220907110728.19092-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Drop defines and enums that are unused since the QMP driver split. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 24 ------------------------ 1 file changed, 24 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 860620972d8a..c5d8eedab4ea 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -32,32 +32,11 @@ /* QPHY_START_CONTROL bits */ #define SERDES_START BIT(0) #define PCS_START BIT(1) -#define PLL_READY_GATE_EN BIT(3) /* QPHY_PCS_STATUS bit */ #define PHYSTATUS BIT(6) #define PHYSTATUS_4_20 BIT(7) -/* QPHY_PCS_READY_STATUS & QPHY_COM_PCS_READY_STATUS bit */ -#define PCS_READY BIT(0) - -/* QPHY_V3_DP_COM_RESET_OVRD_CTRL register bits */ -/* DP PHY soft reset */ -#define SW_DPPHY_RESET BIT(0) -/* mux to select DP PHY reset control, 0:HW control, 1: software reset */ -#define SW_DPPHY_RESET_MUX BIT(1) -/* USB3 PHY soft reset */ -#define SW_USB3PHY_RESET BIT(2) -/* mux to select USB3 PHY reset control, 0:HW control, 1: software reset */ -#define SW_USB3PHY_RESET_MUX BIT(3) - -/* QPHY_V3_DP_COM_PHY_MODE_CTRL register bits */ -#define USB3_MODE BIT(0) /* enables USB3 mode */ -#define DP_MODE BIT(1) /* enables DP mode */ #define PHY_INIT_COMPLETE_TIMEOUT 10000 -#define POWER_DOWN_DELAY_US_MIN 10 -#define POWER_DOWN_DELAY_US_MAX 11 - -#define MAX_PROP_NAME 32 /* Define the assumed distance between lanes for underspecified device trees. */ #define QMP_PHY_LEGACY_LANE_STRIDE 0x400 @@ -109,11 +88,8 @@ enum qphy_reg_layout { /* PCS registers */ QPHY_SW_RESET, QPHY_START_CTRL, - QPHY_PCS_READY_STATUS, QPHY_PCS_STATUS, QPHY_PCS_POWER_DOWN_CONTROL, - /* PCS_MISC registers */ - QPHY_PCS_MISC_TYPEC_CTRL, /* Keep last to ensure regs_layout arrays are properly initialized */ QPHY_LAYOUT_SIZE };