| Message ID | 20220927173702.5200-34-krzysztof.kozlowski@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | pinctrl/arm64: qcom: continued - fix Qualcomm TLMM pinctrl schema warnings | expand |
On Tue, 27 Sep 2022 19:37:01 +0200, Krzysztof Kozlowski wrote: > The TLMM pin controller follows generic pin-controller bindings, so > should have subnodes with '-state' and '-pins'. Otherwise the subnodes > (level one and two) are not properly matched. This method also unifies > the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Reviewed-by: Bjorn Andersson <andersson@kernel.org> > --- > .../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml index ad3496784678..4606ca980dc4 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml @@ -47,9 +47,17 @@ properties: wakeup-parent: true -#PIN CONFIGURATION NODES patternProperties: - '-pins$': + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sc7280-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sc7280-tlmm-state" + additionalProperties: false + +$defs: + qcom-sc7280-tlmm-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. @@ -162,7 +170,7 @@ examples: gpio-ranges = <&tlmm 0 0 175>; wakeup-parent = <&pdc>; - qup_uart5_default: qup-uart5-pins { + qup_uart5_default: qup-uart5-state { pins = "gpio46", "gpio47"; function = "qup13"; drive-strength = <2>;