From patchwork Fri Sep 30 11:29:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12995359 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5985C4332F for ; Fri, 30 Sep 2022 11:38:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230465AbiI3Lib (ORCPT ); Fri, 30 Sep 2022 07:38:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231675AbiI3Lhz (ORCPT ); Fri, 30 Sep 2022 07:37:55 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 371DC64DE for ; Fri, 30 Sep 2022 04:29:35 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id b24so4474626ljk.6 for ; Fri, 30 Sep 2022 04:29:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=5/vixtPVZkNkXwA8g/Wl3HRra55OPPTRqrek9aKxpRA=; b=FQXC9u9sfCjtSQqMdEmKfr6D1t5lzONskOH/77NbuQRQC0f6OhTox3k5aU+qltGF3e 0bAZGp693ICUNzVRb67Q2Qu8sDu4E3DjuW2DOSAj2UmdB+h4oeP6MCjHnjc0KsZdJxdd ZGqQZ2VM6kQ2x+v1KxqBU3qTlyFUg9hgiD3+Mv4qBdci4XndWBCxW+JONBGu9nRB2wTi DKhgPmv7JMwP0tUMN7Glp+rAF51QpAYNbunJl+1NNycSZbYhDPdx1cv6/gPvnW64cJmG AEDcZ6cnu0RWAztTqQftIumgSxTKHnD+/zc8maXrPpbhoQcw6JQ91aeGnOLy3ysgTIco vWIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=5/vixtPVZkNkXwA8g/Wl3HRra55OPPTRqrek9aKxpRA=; b=FuRULD5HviVjbRrmOWb6I4x4H8hTt6ck5Rm7QLNflM33PiYs569qf0b3g2TVtPiGTv u0VFEMV02smHzMHAjMyOfp4QC8tVvA+uFbPJtCnJUnmQAS5DHtyh5rtxjWiSx4CVBjXP qr9TDGOtXBUIJCIajUmISldlU5WiVLbsrPmhkzj7DaWHtvF70d4EtN9pP4v1KvPRay+O g8PFazPEbUfWBhmpzkrdT9+8NaYHaC7NBw9CwUp1rK+pycCtpvRIZStJUh++C7yi2bti eLV+n3+5DwVCpJwqu323q5LHqPteiixeJJyYXzZOvDaLLUcd3FnlnGsoh2ZqtsUOGW2W PQhA== X-Gm-Message-State: ACrzQf1YUL/T5cd+HQLa2gGUL9HryHR9WaRnoJlFch8yH43RG/b44aCO 2pVnQV6Px7hHpvC5Ikjb+V8RKw== X-Google-Smtp-Source: AMsMyM4mj1hHkePWqkhEaiLtBWp+h7SUrH93IwVH7yyCGbwN0KoAm+nJalUZuP64LEQav1u80Cqwog== X-Received: by 2002:a2e:b611:0:b0:26d:36a:696b with SMTP id r17-20020a2eb611000000b0026d036a696bmr2684439ljn.257.1664537373280; Fri, 30 Sep 2022 04:29:33 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id v18-20020a197412000000b0049493c14b17sm264672lfe.181.2022.09.30.04.29.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Sep 2022 04:29:32 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I Cc: Philipp Zabel , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org Subject: [PATCH v2 07/12] phy: qcom-qmp-usb: remove QPHY_PCS_LFPS_RXTERM_IRQ_STATUS reg Date: Fri, 30 Sep 2022 14:29:21 +0300 Message-Id: <20220930112926.638543-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220930112926.638543-1-dmitry.baryshkov@linaro.org> References: <20220930112926.638543-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The QPHY_PCS_LFPS_RXTERM_IRQ_STATUS register is not used, remove it from register layout. Signed-off-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h | 1 + drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 6 ------ 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h index 431e9148b8d0..c7e8e2a28e6e 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h @@ -28,6 +28,7 @@ #define QPHY_V2_PCS_FLL_CNT_VAL_L 0x0c8 #define QPHY_V2_PCS_FLL_CNT_VAL_H_TOL 0x0cc #define QPHY_V2_PCS_FLL_MAN_CODE 0x0d0 +#define QPHY_V2_PCS_LFPS_RXTERM_IRQ_STATUS 0x178 #define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB 0x1a8 #define QPHY_V2_PCS_OSC_DTCT_ACTIONS 0x1ac #define QPHY_V2_PCS_RX_SIGDET_LVL 0x1d8 diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c index 0f286c648872..9d112aa34ba3 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c @@ -56,9 +56,6 @@ /* QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR register bits */ #define IRQ_CLEAR BIT(0) -/* QPHY_PCS_LFPS_RXTERM_IRQ_STATUS register bits */ -#define RCVR_DETECT BIT(0) - /* QPHY_V3_PCS_MISC_CLAMP_ENABLE register bits */ #define CLAMP_EN BIT(0) /* enables i/o clamp_n */ @@ -111,7 +108,6 @@ enum qphy_reg_layout { QPHY_PCS_STATUS, QPHY_PCS_AUTONOMOUS_MODE_CTRL, QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR, - QPHY_PCS_LFPS_RXTERM_IRQ_STATUS, QPHY_PCS_POWER_DOWN_CONTROL, /* PCS_MISC registers */ QPHY_PCS_MISC_TYPEC_CTRL, @@ -125,7 +121,6 @@ static const unsigned int usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_PCS_STATUS] = 0x17c, [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = 0x0d4, [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = 0x0d8, - [QPHY_PCS_LFPS_RXTERM_IRQ_STATUS] = 0x178, [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, }; @@ -135,7 +130,6 @@ static const unsigned int qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_PCS_STATUS] = 0x174, [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = 0x0d8, [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = 0x0dc, - [QPHY_PCS_LFPS_RXTERM_IRQ_STATUS] = 0x170, [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, };