| Message ID | 20221103181051.26912-1-quic_bjorande@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | pinctrl: qcom: sc8280xp: Rectify UFS reset pins | expand |
On Thu, Nov 03, 2022 at 11:10:51AM -0700, Bjorn Andersson wrote: > From: Anjana Hari <quic_ahari@quicinc.com> > > UFS reset pin offsets are wrongly configured for SC8280XP, > correcting the same for both UFS instances here. > > Signed-off-by: Anjana Hari <quic_ahari@quicinc.com> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # QDrive3 Functionally I saw no difference using ufs_mem_hc that I can notice. From what I see in the downstream source the prior diff looks proper, but I found a hardware document that says after diff is proper, hence the R-B. I'll trust the hardware doc. Thanks, Andrew > --- > drivers/pinctrl/qcom/pinctrl-sc8280xp.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/pinctrl/qcom/pinctrl-sc8280xp.c b/drivers/pinctrl/qcom/pinctrl-sc8280xp.c > index aa2075390f3e..e96c00686a25 100644 > --- a/drivers/pinctrl/qcom/pinctrl-sc8280xp.c > +++ b/drivers/pinctrl/qcom/pinctrl-sc8280xp.c > @@ -1873,8 +1873,8 @@ static const struct msm_pingroup sc8280xp_groups[] = { > [225] = PINGROUP(225, hs3_mi2s, phase_flag, _, _, _, _, egpio), > [226] = PINGROUP(226, hs3_mi2s, phase_flag, _, _, _, _, egpio), > [227] = PINGROUP(227, hs3_mi2s, phase_flag, _, _, _, _, egpio), > - [228] = UFS_RESET(ufs_reset, 0xf1004), > - [229] = UFS_RESET(ufs1_reset, 0xf3004), > + [228] = UFS_RESET(ufs_reset, 0xf1000), > + [229] = UFS_RESET(ufs1_reset, 0xf3000), > [230] = SDC_QDSD_PINGROUP(sdc2_clk, 0xe8000, 14, 6), > [231] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xe8000, 11, 3), > [232] = SDC_QDSD_PINGROUP(sdc2_data, 0xe8000, 9, 0), > -- > 2.17.1 >
On Thu, Nov 3, 2022 at 7:11 PM Bjorn Andersson <quic_bjorande@quicinc.com> wrote: > From: Anjana Hari <quic_ahari@quicinc.com> > > UFS reset pin offsets are wrongly configured for SC8280XP, > correcting the same for both UFS instances here. > > Signed-off-by: Anjana Hari <quic_ahari@quicinc.com> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Patch applied for fixes (looks to me like it should go into fixes at least). Yours, Linus Walleij
diff --git a/drivers/pinctrl/qcom/pinctrl-sc8280xp.c b/drivers/pinctrl/qcom/pinctrl-sc8280xp.c index aa2075390f3e..e96c00686a25 100644 --- a/drivers/pinctrl/qcom/pinctrl-sc8280xp.c +++ b/drivers/pinctrl/qcom/pinctrl-sc8280xp.c @@ -1873,8 +1873,8 @@ static const struct msm_pingroup sc8280xp_groups[] = { [225] = PINGROUP(225, hs3_mi2s, phase_flag, _, _, _, _, egpio), [226] = PINGROUP(226, hs3_mi2s, phase_flag, _, _, _, _, egpio), [227] = PINGROUP(227, hs3_mi2s, phase_flag, _, _, _, _, egpio), - [228] = UFS_RESET(ufs_reset, 0xf1004), - [229] = UFS_RESET(ufs1_reset, 0xf3004), + [228] = UFS_RESET(ufs_reset, 0xf1000), + [229] = UFS_RESET(ufs1_reset, 0xf3000), [230] = SDC_QDSD_PINGROUP(sdc2_clk, 0xe8000, 14, 6), [231] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xe8000, 11, 3), [232] = SDC_QDSD_PINGROUP(sdc2_data, 0xe8000, 9, 0),