diff mbox series

[v2,2/2] arm64: dts: qcom: Fully describe fingerprint node on Trogdor

Message ID 20221107191535.624371-3-swboyd@chromium.org (mailing list archive)
State Accepted
Headers show
Series Update fingerprint node on herobrine/trogdor | expand

Commit Message

Stephen Boyd Nov. 7, 2022, 7:15 p.m. UTC
Update the fingerprint node on Trogdor to match the fingerprint DT
binding. This will allow us to drive the reset and boot gpios from the
driver when it is re-attached after flashing. We'll also be able to boot
the fingerprint processor if the BIOS isn't doing it for us.

Cc: Douglas Anderson <dianders@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
---
 arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

Comments

Doug Anderson Nov. 8, 2022, 1:22 a.m. UTC | #1
Hi,

On Mon, Nov 7, 2022 at 11:15 AM Stephen Boyd <swboyd@chromium.org> wrote:
>
> Update the fingerprint node on Trogdor to match the fingerprint DT
> binding. This will allow us to drive the reset and boot gpios from the
> driver when it is re-attached after flashing. We'll also be able to boot
> the fingerprint processor if the BIOS isn't doing it for us.
>
> Cc: Douglas Anderson <dianders@chromium.org>
> Cc: Matthias Kaehlcke <mka@chromium.org>
> Cc: Alexandru M Stan <amstan@chromium.org>
> Signed-off-by: Stephen Boyd <swboyd@chromium.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 20 ++++++++++++++++++--
>  1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
> index 4a5ea17a15ba..65601bea0797 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
> @@ -894,13 +894,16 @@ ap_spi_fp: &spi10 {
>         cs-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
>
>         cros_ec_fp: ec@0 {
> -               compatible = "google,cros-ec-spi";
> +               compatible = "google,cros-ec-fp", "google,cros-ec-spi";
>                 reg = <0>;
>                 interrupt-parent = <&tlmm>;
>                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
>                 pinctrl-names = "default";
> -               pinctrl-0 = <&fp_to_ap_irq_l>;
> +               pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
> +               boot0-gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
> +               reset-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;

This isn't totally a no-op change since the pinctrl entries for
fp_rst_l and fpmcu_boot0 will now be applied. I assume you've
confirmed that it works as expected?

...other than the subject (same as patch #1), this LGTM.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Stephen Boyd Nov. 9, 2022, 12:56 a.m. UTC | #2
Quoting Doug Anderson (2022-11-07 17:22:51)
> On Mon, Nov 7, 2022 at 11:15 AM Stephen Boyd <swboyd@chromium.org> wrote:
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
> > index 4a5ea17a15ba..65601bea0797 100644
> > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
> > @@ -894,13 +894,16 @@ ap_spi_fp: &spi10 {
> >         cs-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
> >
> >         cros_ec_fp: ec@0 {
> > -               compatible = "google,cros-ec-spi";
> > +               compatible = "google,cros-ec-fp", "google,cros-ec-spi";
> >                 reg = <0>;
> >                 interrupt-parent = <&tlmm>;
> >                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
> >                 pinctrl-names = "default";
> > -               pinctrl-0 = <&fp_to_ap_irq_l>;
> > +               pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
> > +               boot0-gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
> > +               reset-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
>
> This isn't totally a no-op change since the pinctrl entries for
> fp_rst_l and fpmcu_boot0 will now be applied. I assume you've
> confirmed that it works as expected?

Yes my fingerprint still works to unlock. I also confirmed that the bios
sets these pinctrl settings so this is to be more explicit and not rely
on bootloader state.

>
> ...other than the subject (same as patch #1), this LGTM.
>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>

Cool thanks.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
index 4a5ea17a15ba..65601bea0797 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
@@ -894,13 +894,16 @@  ap_spi_fp: &spi10 {
 	cs-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
 
 	cros_ec_fp: ec@0 {
-		compatible = "google,cros-ec-spi";
+		compatible = "google,cros-ec-fp", "google,cros-ec-spi";
 		reg = <0>;
 		interrupt-parent = <&tlmm>;
 		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&fp_to_ap_irq_l>;
+		pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
+		boot0-gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
 		spi-max-frequency = <3000000>;
+		vdd-supply = <&pp3300_fp_tp>;
 	};
 };
 
@@ -1226,6 +1229,13 @@  en_pp3300_hub: en-pp3300-hub-state {
 		bias-disable;
 	};
 
+	fp_rst_l: fp-rst-l-state {
+		pins = "gpio22";
+		function = "gpio";
+		bias-disable;
+		drive-strength = <2>;
+	};
+
 	fp_to_ap_irq_l: fp-to-ap-irq-l-state {
 		pins = "gpio4";
 		function = "gpio";
@@ -1235,6 +1245,12 @@  fp_to_ap_irq_l: fp-to-ap-irq-l-state {
 		bias-disable;
 	};
 
+	fpmcu_boot0: fpmcu-boot0-state {
+		pins = "gpio10";
+		function = "gpio";
+		bias-disable;
+	};
+
 	h1_ap_int_odl: h1-ap-int-odl-state {
 		pins = "gpio42";
 		function = "gpio";