diff mbox series

[v6,1/7] arm64: dts: qcom: sdm845: Define the number of available ports

Message ID 20221116162801.546737-2-bryan.odonoghue@linaro.org (mailing list archive)
State Superseded
Headers show
Series CAMSS fixes for rb3, switch on IMX577 for RB5 | expand

Commit Message

Bryan O'Donoghue Nov. 16, 2022, 4:27 p.m. UTC
The number of available ports is SoC specific so we should define it in the
SoC dtsi. For the case of the sdm845 that is 4 CSI PHYs => four ports.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Comments

Konrad Dybcio Nov. 16, 2022, 4:38 p.m. UTC | #1
On 16/11/2022 17:27, Bryan O'Donoghue wrote:
> The number of available ports is SoC specific so we should define it in the
> SoC dtsi. For the case of the sdm845 that is 4 CSI PHYs => four ports.
> 
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>   arch/arm64/boot/dts/qcom/sdm845.dtsi | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 1a257f6728874..29e6d64e74c97 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -4368,6 +4368,22 @@ camss: camss@a00000 {
>   			ports {
>   				#address-cells = <1>;
>   				#size-cells = <0>;
> +
> +				port@0 {
> +					reg = <0>;
> +				};
> +
> +				port@1 {
> +					reg = <1>;
> +				};
> +
> +				port@2 {
> +					reg = <2>;
> +				};
> +
> +				port@3 {
> +					reg = <3>;
> +				};
>   			};
>   		};
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 1a257f6728874..29e6d64e74c97 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -4368,6 +4368,22 @@  camss: camss@a00000 {
 			ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+				};
+
+				port@1 {
+					reg = <1>;
+				};
+
+				port@2 {
+					reg = <2>;
+				};
+
+				port@3 {
+					reg = <3>;
+				};
 			};
 		};