| Message ID | 20221206125635.952114-2-abel.vesa@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | clk: qcom: Add support for SM8550 | expand |
On 06/12/2022 13:56, Abel Vesa wrote: > Add bindings documentation for clock TCSR driver on SM8550. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/clock/qcom,sm8550-tcsr.yaml | 53 +++++++++++++++++++ > include/dt-bindings/clock/qcom,sm8550-tcsr.h | 18 +++++++ > 2 files changed, 71 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsr.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > new file mode 100644 > index 000000000000..15176b0457d1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm TCSR Clock Controller on SM8550 > + > +maintainers: > + - Bjorn Andersson <andersson@kernel.org> > + > +description: | > + Qualcomm TCSR clock control module provides the clocks, resets and > + power domains on SM8550 > + > + See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h > + > +properties: > + compatible: > + const: qcom,sm8550-tcsr This still misses syscon. Did you send it before we talk on IRC? Best regards, Krzysztof
On Tue, Dec 06, 2022 at 02:56:31PM +0200, Abel Vesa wrote: > Add bindings documentation for clock TCSR driver on SM8550. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/clock/qcom,sm8550-tcsr.yaml | 53 +++++++++++++++++++ > include/dt-bindings/clock/qcom,sm8550-tcsr.h | 18 +++++++ > 2 files changed, 71 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsr.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > new file mode 100644 > index 000000000000..15176b0457d1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm TCSR Clock Controller on SM8550 > + > +maintainers: > + - Bjorn Andersson <andersson@kernel.org> > + > +description: | > + Qualcomm TCSR clock control module provides the clocks, resets and > + power domains on SM8550 > + > + See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h > + > +properties: > + compatible: > + const: qcom,sm8550-tcsr > + > + clocks: > + items: > + - description: Board XO source This sounds like the crystal feeding the PMIC, but the clock here should be the signal that arrives at the CXO pin of the SoC. Other than that, this looks good now. Thanks, Bjorn > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > +required: > + - compatible > + - clocks > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,rpmh.h> > + > + clock-controller@1fc0000 { > + compatible = "qcom,sm8550-tcsr"; > + reg = <0x1fc0000 0x30000>; > + clocks = <&rpmhcc RPMH_CXO_PAD_CLK>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + > +... > diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsr.h b/include/dt-bindings/clock/qcom,sm8550-tcsr.h > new file mode 100644 > index 000000000000..091cb76f953a > --- /dev/null > +++ b/include/dt-bindings/clock/qcom,sm8550-tcsr.h > @@ -0,0 +1,18 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > +/* > + * Copyright (c) 2022, The Linux Foundation. All rights reserved. > + * Copyright (c) 2022, Linaro Limited > + */ > + > +#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H > +#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H > + > +/* TCSR CC clocks */ > +#define TCSR_PCIE_0_CLKREF_EN 0 > +#define TCSR_PCIE_1_CLKREF_EN 1 > +#define TCSR_UFS_CLKREF_EN 2 > +#define TCSR_UFS_PAD_CLKREF_EN 3 > +#define TCSR_USB2_CLKREF_EN 4 > +#define TCSR_USB3_CLKREF_EN 5 > + > +#endif > -- > 2.34.1 >
On Tue, 06 Dec 2022 14:56:31 +0200, Abel Vesa wrote: > Add bindings documentation for clock TCSR driver on SM8550. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/clock/qcom,sm8550-tcsr.yaml | 53 +++++++++++++++++++ > include/dt-bindings/clock/qcom,sm8550-tcsr.h | 18 +++++++ > 2 files changed, 71 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsr.h > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Error: Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.example.dts:23.29-30 syntax error FATAL ERROR: Unable to parse input tree make[1]: *** [scripts/Makefile.lib:406: Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.example.dtb] Error 1 make[1]: *** Waiting for unfinished jobs.... make: *** [Makefile:1492: dt_binding_check] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20221206125635.952114-2-abel.vesa@linaro.org The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 22-12-06 16:35:16, Krzysztof Kozlowski wrote: > On 06/12/2022 13:56, Abel Vesa wrote: > > Add bindings documentation for clock TCSR driver on SM8550. > > > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > .../bindings/clock/qcom,sm8550-tcsr.yaml | 53 +++++++++++++++++++ > > include/dt-bindings/clock/qcom,sm8550-tcsr.h | 18 +++++++ > > 2 files changed, 71 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > > create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsr.h > > > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > > new file mode 100644 > > index 000000000000..15176b0457d1 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > > @@ -0,0 +1,53 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm TCSR Clock Controller on SM8550 > > + > > +maintainers: > > + - Bjorn Andersson <andersson@kernel.org> > > + > > +description: | > > + Qualcomm TCSR clock control module provides the clocks, resets and > > + power domains on SM8550 > > + > > + See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h > > + > > +properties: > > + compatible: > > + const: qcom,sm8550-tcsr > > This still misses syscon. Did you send it before we talk on IRC? Oups, I forgot to squash that part in. Will send a new version. > > Best regards, > Krzysztof >
On 22-12-06 12:23:32, Bjorn Andersson wrote: > On Tue, Dec 06, 2022 at 02:56:31PM +0200, Abel Vesa wrote: > > Add bindings documentation for clock TCSR driver on SM8550. > > > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > .../bindings/clock/qcom,sm8550-tcsr.yaml | 53 +++++++++++++++++++ > > include/dt-bindings/clock/qcom,sm8550-tcsr.h | 18 +++++++ > > 2 files changed, 71 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > > create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsr.h > > > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > > new file mode 100644 > > index 000000000000..15176b0457d1 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml > > @@ -0,0 +1,53 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm TCSR Clock Controller on SM8550 > > + > > +maintainers: > > + - Bjorn Andersson <andersson@kernel.org> > > + > > +description: | > > + Qualcomm TCSR clock control module provides the clocks, resets and > > + power domains on SM8550 > > + > > + See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h > > + > > +properties: > > + compatible: > > + const: qcom,sm8550-tcsr > > + > > + clocks: > > + items: > > + - description: Board XO source > > This sounds like the crystal feeding the PMIC, but the clock here should > be the signal that arrives at the CXO pin of the SoC. Oh, I guess this should be: - description: TCXO pad clock Will send a new version. > > Other than that, this looks good now. > > Thanks, > Bjorn > > > + > > + reg: > > + maxItems: 1 > > + > > + '#clock-cells': > > + const: 1 > > + > > + '#reset-cells': > > + const: 1 > > + > > +required: > > + - compatible > > + - clocks > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/qcom,rpmh.h> > > + > > + clock-controller@1fc0000 { > > + compatible = "qcom,sm8550-tcsr"; > > + reg = <0x1fc0000 0x30000>; > > + clocks = <&rpmhcc RPMH_CXO_PAD_CLK>; > > + #clock-cells = <1>; > > + #reset-cells = <1>; > > + }; > > + > > +... > > diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsr.h b/include/dt-bindings/clock/qcom,sm8550-tcsr.h > > new file mode 100644 > > index 000000000000..091cb76f953a > > --- /dev/null > > +++ b/include/dt-bindings/clock/qcom,sm8550-tcsr.h > > @@ -0,0 +1,18 @@ > > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > > +/* > > + * Copyright (c) 2022, The Linux Foundation. All rights reserved. > > + * Copyright (c) 2022, Linaro Limited > > + */ > > + > > +#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H > > +#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H > > + > > +/* TCSR CC clocks */ > > +#define TCSR_PCIE_0_CLKREF_EN 0 > > +#define TCSR_PCIE_1_CLKREF_EN 1 > > +#define TCSR_UFS_CLKREF_EN 2 > > +#define TCSR_UFS_PAD_CLKREF_EN 3 > > +#define TCSR_USB2_CLKREF_EN 4 > > +#define TCSR_USB3_CLKREF_EN 5 > > + > > +#endif > > -- > > 2.34.1 > >
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml new file mode 100644 index 000000000000..15176b0457d1 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm TCSR Clock Controller on SM8550 + +maintainers: + - Bjorn Andersson <andersson@kernel.org> + +description: | + Qualcomm TCSR clock control module provides the clocks, resets and + power domains on SM8550 + + See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h + +properties: + compatible: + const: qcom,sm8550-tcsr + + clocks: + items: + - description: Board XO source + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + +required: + - compatible + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + + clock-controller@1fc0000 { + compatible = "qcom,sm8550-tcsr"; + reg = <0x1fc0000 0x30000>; + clocks = <&rpmhcc RPMH_CXO_PAD_CLK>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + +... diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsr.h b/include/dt-bindings/clock/qcom,sm8550-tcsr.h new file mode 100644 index 000000000000..091cb76f953a --- /dev/null +++ b/include/dt-bindings/clock/qcom,sm8550-tcsr.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2022, The Linux Foundation. All rights reserved. + * Copyright (c) 2022, Linaro Limited + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H +#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H + +/* TCSR CC clocks */ +#define TCSR_PCIE_0_CLKREF_EN 0 +#define TCSR_PCIE_1_CLKREF_EN 1 +#define TCSR_UFS_CLKREF_EN 2 +#define TCSR_UFS_PAD_CLKREF_EN 3 +#define TCSR_USB2_CLKREF_EN 4 +#define TCSR_USB3_CLKREF_EN 5 + +#endif