| Message ID | 20221207001503.93790-5-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | clk: qcom: smd-rpm: drop platform names | expand |
On 12/6/22 6:14 PM, Dmitry Baryshkov wrote: > Newer platforms (msm8998, sdm660, sm6125) have low noise LN_BB_CLKn > clocks. The driver already uses proper clock indices > (RPM_SMD_LN_BB_CLKn). Fix clock names used by these platforms. > > Fixes: a0384ecfe2aa ("clk: qcom: smd-rpm: De-duplicate identical entries") > Fixes: edeb2ca74716 ("clk: qcom: smd: Add support for SM6125 rpm clocks") > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Looks good. Next time you could improve your description by saying what the fix looks like. E.g., "Some platforms include a 'ln_' prefix for such clocks, some do not. Add that prefix where it's missing for consistency and clarity." You could also mention that you are moving a few of these definitions, to group them a certain way. Reviewed-by: Alex Elder <elder@linaro.org> > --- > drivers/clk/qcom/clk-smd-rpm.c | 44 ++++++++++++++++++---------------- > 1 file changed, 24 insertions(+), 20 deletions(-) > > diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c > index 31ef6345ff01..a0bf58785921 100644 > --- a/drivers/clk/qcom/clk-smd-rpm.c > +++ b/drivers/clk/qcom/clk-smd-rpm.c > @@ -852,6 +852,10 @@ static const struct rpm_smd_clk_desc rpm_clk_qcs404 = { > .num_clks = ARRAY_SIZE(qcs404_clks), > }; > > +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk1, ln_bb_clk1_a, 1, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1_pin, ln_bb_clk1_a_pin, 1, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk2, ln_bb_clk2_a, 2, 19200000); > +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2_pin, ln_bb_clk2_a_pin, 2, 19200000); > DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000); > DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin, 3, 19200000); > DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk, > @@ -882,16 +886,16 @@ static struct clk_smd_rpm *msm8998_clks[] = { > [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a, > [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk, > [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk, > - [RPM_SMD_LN_BB_CLK1] = &msm8916_bb_clk1, > - [RPM_SMD_LN_BB_CLK1_A] = &msm8916_bb_clk1_a, > - [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, > - [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, > + [RPM_SMD_LN_BB_CLK1] = &msm8998_ln_bb_clk1, > + [RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a, > + [RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2, > + [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a, > [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, > [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, > - [RPM_SMD_LN_BB_CLK1_PIN] = &msm8916_bb_clk1_pin, > - [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8916_bb_clk1_a_pin, > - [RPM_SMD_LN_BB_CLK2_PIN] = &msm8916_bb_clk2_pin, > - [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin, > + [RPM_SMD_LN_BB_CLK1_PIN] = &msm8998_ln_bb_clk1_pin, > + [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8998_ln_bb_clk1_a_pin, > + [RPM_SMD_LN_BB_CLK2_PIN] = &msm8998_ln_bb_clk2_pin, > + [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8998_ln_bb_clk2_a_pin, > [RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin, > [RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin, > [RPM_SMD_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk, > @@ -946,18 +950,18 @@ static struct clk_smd_rpm *sdm660_clks[] = { > [RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a, > [RPM_SMD_DIV_CLK1] = &msm8974_div_clk1, > [RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1, > - [RPM_SMD_LN_BB_CLK] = &msm8916_bb_clk1, > - [RPM_SMD_LN_BB_A_CLK] = &msm8916_bb_clk1_a, > - [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, > - [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, > + [RPM_SMD_LN_BB_CLK] = &msm8998_ln_bb_clk1, > + [RPM_SMD_LN_BB_A_CLK] = &msm8998_ln_bb_clk1_a, > + [RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2, > + [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a, > [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, > [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, > [RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin, > [RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin, > - [RPM_SMD_LN_BB_CLK1_PIN] = &msm8916_bb_clk1_pin, > - [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8916_bb_clk1_a_pin, > - [RPM_SMD_LN_BB_CLK2_PIN] = &msm8916_bb_clk2_pin, > - [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin, > + [RPM_SMD_LN_BB_CLK1_PIN] = &msm8998_ln_bb_clk1_pin, > + [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8998_ln_bb_clk1_a_pin, > + [RPM_SMD_LN_BB_CLK2_PIN] = &msm8998_ln_bb_clk2_pin, > + [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8998_ln_bb_clk2_a_pin, > [RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin, > [RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin, > }; > @@ -1057,10 +1061,10 @@ static struct clk_smd_rpm *sm6125_clks[] = { > [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk, > [RPM_SMD_CE1_CLK] = &msm8992_ce1_clk, > [RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk, > - [RPM_SMD_LN_BB_CLK1] = &msm8916_bb_clk1, > - [RPM_SMD_LN_BB_CLK1_A] = &msm8916_bb_clk1_a, > - [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, > - [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, > + [RPM_SMD_LN_BB_CLK1] = &msm8998_ln_bb_clk1, > + [RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a, > + [RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2, > + [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a, > [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, > [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, > [RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 31ef6345ff01..a0bf58785921 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -852,6 +852,10 @@ static const struct rpm_smd_clk_desc rpm_clk_qcs404 = { .num_clks = ARRAY_SIZE(qcs404_clks), }; +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk1, ln_bb_clk1_a, 1, 19200000); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk1_pin, ln_bb_clk1_a_pin, 1, 19200000); +DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk2, ln_bb_clk2_a, 2, 19200000); +DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk2_pin, ln_bb_clk2_a_pin, 2, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8998, ln_bb_clk3, ln_bb_clk3_a, 3, 19200000); DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8998, ln_bb_clk3_pin, ln_bb_clk3_a_pin, 3, 19200000); DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk, @@ -882,16 +886,16 @@ static struct clk_smd_rpm *msm8998_clks[] = { [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a, [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk, [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk, - [RPM_SMD_LN_BB_CLK1] = &msm8916_bb_clk1, - [RPM_SMD_LN_BB_CLK1_A] = &msm8916_bb_clk1_a, - [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, - [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, + [RPM_SMD_LN_BB_CLK1] = &msm8998_ln_bb_clk1, + [RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a, + [RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2, + [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a, [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, - [RPM_SMD_LN_BB_CLK1_PIN] = &msm8916_bb_clk1_pin, - [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8916_bb_clk1_a_pin, - [RPM_SMD_LN_BB_CLK2_PIN] = &msm8916_bb_clk2_pin, - [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin, + [RPM_SMD_LN_BB_CLK1_PIN] = &msm8998_ln_bb_clk1_pin, + [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8998_ln_bb_clk1_a_pin, + [RPM_SMD_LN_BB_CLK2_PIN] = &msm8998_ln_bb_clk2_pin, + [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8998_ln_bb_clk2_a_pin, [RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin, [RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin, [RPM_SMD_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk, @@ -946,18 +950,18 @@ static struct clk_smd_rpm *sdm660_clks[] = { [RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a, [RPM_SMD_DIV_CLK1] = &msm8974_div_clk1, [RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1, - [RPM_SMD_LN_BB_CLK] = &msm8916_bb_clk1, - [RPM_SMD_LN_BB_A_CLK] = &msm8916_bb_clk1_a, - [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, - [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, + [RPM_SMD_LN_BB_CLK] = &msm8998_ln_bb_clk1, + [RPM_SMD_LN_BB_A_CLK] = &msm8998_ln_bb_clk1_a, + [RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2, + [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a, [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, [RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin, [RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin, - [RPM_SMD_LN_BB_CLK1_PIN] = &msm8916_bb_clk1_pin, - [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8916_bb_clk1_a_pin, - [RPM_SMD_LN_BB_CLK2_PIN] = &msm8916_bb_clk2_pin, - [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin, + [RPM_SMD_LN_BB_CLK1_PIN] = &msm8998_ln_bb_clk1_pin, + [RPM_SMD_LN_BB_CLK1_A_PIN] = &msm8998_ln_bb_clk1_a_pin, + [RPM_SMD_LN_BB_CLK2_PIN] = &msm8998_ln_bb_clk2_pin, + [RPM_SMD_LN_BB_CLK2_A_PIN] = &msm8998_ln_bb_clk2_a_pin, [RPM_SMD_LN_BB_CLK3_PIN] = &msm8998_ln_bb_clk3_pin, [RPM_SMD_LN_BB_CLK3_A_PIN] = &msm8998_ln_bb_clk3_a_pin, }; @@ -1057,10 +1061,10 @@ static struct clk_smd_rpm *sm6125_clks[] = { [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk, [RPM_SMD_CE1_CLK] = &msm8992_ce1_clk, [RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk, - [RPM_SMD_LN_BB_CLK1] = &msm8916_bb_clk1, - [RPM_SMD_LN_BB_CLK1_A] = &msm8916_bb_clk1_a, - [RPM_SMD_LN_BB_CLK2] = &msm8916_bb_clk2, - [RPM_SMD_LN_BB_CLK2_A] = &msm8916_bb_clk2_a, + [RPM_SMD_LN_BB_CLK1] = &msm8998_ln_bb_clk1, + [RPM_SMD_LN_BB_CLK1_A] = &msm8998_ln_bb_clk1_a, + [RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2, + [RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a, [RPM_SMD_LN_BB_CLK3] = &msm8998_ln_bb_clk3, [RPM_SMD_LN_BB_CLK3_A] = &msm8998_ln_bb_clk3_a, [RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
Newer platforms (msm8998, sdm660, sm6125) have low noise LN_BB_CLKn clocks. The driver already uses proper clock indices (RPM_SMD_LN_BB_CLKn). Fix clock names used by these platforms. Fixes: a0384ecfe2aa ("clk: qcom: smd-rpm: De-duplicate identical entries") Fixes: edeb2ca74716 ("clk: qcom: smd: Add support for SM6125 rpm clocks") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/clk/qcom/clk-smd-rpm.c | 44 ++++++++++++++++++---------------- 1 file changed, 24 insertions(+), 20 deletions(-)