| Message ID | 20221217001730.540502-13-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | clk: qcom: gcc-qcs404: convert to parent_data | expand |
On 17.12.2022 01:17, Dmitry Baryshkov wrote: > Add support for two GDSCs provided by this clock controller. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > drivers/clk/qcom/gcc-qcs404.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c > index 8fb268671f0c..f8dbfffc2b8e 100644 > --- a/drivers/clk/qcom/gcc-qcs404.c > +++ b/drivers/clk/qcom/gcc-qcs404.c > @@ -19,6 +19,7 @@ > #include "clk-rcg.h" > #include "clk-regmap.h" > #include "common.h" > +#include "gdsc.h" > #include "reset.h" > > enum { > @@ -2598,6 +2599,22 @@ static struct clk_branch gcc_wdsp_q6ss_axim_clk = { > }, > }; > > +static struct gdsc mdss_gdsc = { > + .gdscr = 0x4d078, > + .pd = { > + .name = "mdss", > + }, > + .pwrsts = PWRSTS_OFF_ON, > +}; > + > +static struct gdsc oxili_gdsc = { > + .gdscr = 0x5901c, > + .pd = { > + .name = "oxili", > + }, > + .pwrsts = PWRSTS_OFF_ON, > +}; > + > static struct clk_hw *gcc_qcs404_hws[] = { > &cxo.hw, > }; > @@ -2748,6 +2765,11 @@ static struct clk_regmap *gcc_qcs404_clocks[] = { > > }; > > +static struct gdsc *gcc_qcs404_gdscs[] = { > + [MDSS_GDSC] = &mdss_gdsc, > + [OXILI_GDSC] = &oxili_gdsc, > +}; > + > static const struct qcom_reset_map gcc_qcs404_resets[] = { > [GCC_GENI_IR_BCR] = { 0x0F000 }, > [GCC_CDSP_RESTART] = { 0x18000 }, > @@ -2790,6 +2812,8 @@ static const struct qcom_cc_desc gcc_qcs404_desc = { > .num_resets = ARRAY_SIZE(gcc_qcs404_resets), > .clk_hws = gcc_qcs404_hws, > .num_clk_hws = ARRAY_SIZE(gcc_qcs404_hws), > + .gdscs = gcc_qcs404_gdscs, > + .num_gdscs = ARRAY_SIZE(gcc_qcs404_gdscs), > }; > > static const struct of_device_id gcc_qcs404_match_table[] = {
diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c index 8fb268671f0c..f8dbfffc2b8e 100644 --- a/drivers/clk/qcom/gcc-qcs404.c +++ b/drivers/clk/qcom/gcc-qcs404.c @@ -19,6 +19,7 @@ #include "clk-rcg.h" #include "clk-regmap.h" #include "common.h" +#include "gdsc.h" #include "reset.h" enum { @@ -2598,6 +2599,22 @@ static struct clk_branch gcc_wdsp_q6ss_axim_clk = { }, }; +static struct gdsc mdss_gdsc = { + .gdscr = 0x4d078, + .pd = { + .name = "mdss", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc oxili_gdsc = { + .gdscr = 0x5901c, + .pd = { + .name = "oxili", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + static struct clk_hw *gcc_qcs404_hws[] = { &cxo.hw, }; @@ -2748,6 +2765,11 @@ static struct clk_regmap *gcc_qcs404_clocks[] = { }; +static struct gdsc *gcc_qcs404_gdscs[] = { + [MDSS_GDSC] = &mdss_gdsc, + [OXILI_GDSC] = &oxili_gdsc, +}; + static const struct qcom_reset_map gcc_qcs404_resets[] = { [GCC_GENI_IR_BCR] = { 0x0F000 }, [GCC_CDSP_RESTART] = { 0x18000 }, @@ -2790,6 +2812,8 @@ static const struct qcom_cc_desc gcc_qcs404_desc = { .num_resets = ARRAY_SIZE(gcc_qcs404_resets), .clk_hws = gcc_qcs404_hws, .num_clk_hws = ARRAY_SIZE(gcc_qcs404_hws), + .gdscs = gcc_qcs404_gdscs, + .num_gdscs = ARRAY_SIZE(gcc_qcs404_gdscs), }; static const struct of_device_id gcc_qcs404_match_table[] = {
Add support for two GDSCs provided by this clock controller. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/clk/qcom/gcc-qcs404.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)