diff mbox series

[08/15] clk: qcom: gcc-qcs404: get rid of the test clock

Message ID 20221217001730.540502-9-dmitry.baryshkov@linaro.org (mailing list archive)
State Superseded
Headers show
Series clk: qcom: gcc-qcs404: convert to parent_data | expand

Commit Message

Dmitry Baryshkov Dec. 17, 2022, 12:17 a.m. UTC 
The test clock isn't in the bindings and apparently it's not used by
anyone upstream.  Remove it.

Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/clk/qcom/gcc-qcs404.c | 34 ----------------------------------
 1 file changed, 34 deletions(-)

Comments

Konrad Dybcio Dec. 17, 2022, 3:09 p.m. UTC | #1 
On 17.12.2022 01:17, Dmitry Baryshkov wrote:
> The test clock isn't in the bindings and apparently it's not used by
> anyone upstream.  Remove it.
> 
> Suggested-by: Stephen Boyd <swboyd@chromium.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>  drivers/clk/qcom/gcc-qcs404.c | 34 ----------------------------------
>  1 file changed, 34 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
> index 5636c6524d0f..fb94c57a00af 100644
> --- a/drivers/clk/qcom/gcc-qcs404.c
> +++ b/drivers/clk/qcom/gcc-qcs404.c
> @@ -22,7 +22,6 @@
>  #include "reset.h"
>  
>  enum {
> -	P_CORE_BI_PLL_TEST_SE,
>  	P_DSI0_PHY_PLL_OUT_BYTECLK,
>  	P_DSI0_PHY_PLL_OUT_DSICLK,
>  	/* P_GPLL0_OUT_AUX, */
> @@ -41,29 +40,24 @@ enum {
>  static const struct parent_map gcc_parent_map_0[] = {
>  	{ P_XO, 0 },
>  	{ P_GPLL0_OUT_MAIN, 1 },
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_0[] = {
>  	"cxo",
>  	"gpll0_out_main",
> -	"core_bi_pll_test_se",
>  };
>  
>  static const char * const gcc_parent_names_ao_0[] = {
>  	"cxo",
>  	"gpll0_ao_out_main",
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_1[] = {
>  	{ P_XO, 0 },
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_1[] = {
>  	"cxo",
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_2[] = {
> @@ -84,54 +78,46 @@ static const struct parent_map gcc_parent_map_3[] = {
>  	{ P_XO, 0 },
>  	{ P_GPLL0_OUT_MAIN, 1 },
>  	{ P_GPLL6_OUT_AUX, 2 },
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_3[] = {
>  	"cxo",
>  	"gpll0_out_main",
>  	"gpll6_out_aux",
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_4[] = {
>  	{ P_XO, 0 },
>  	{ P_GPLL1_OUT_MAIN, 1 },
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_4[] = {
>  	"cxo",
>  	"gpll1_out_main",
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_5[] = {
>  	{ P_XO, 0 },
>  	{ P_DSI0_PHY_PLL_OUT_BYTECLK, 1 },
>  	/* { P_GPLL0_OUT_AUX, 2 }, */
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_5[] = {
>  	"cxo",
>  	"dsi0pllbyte",
>  	/* "gpll0_out_aux", */
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_6[] = {
>  	{ P_XO, 0 },
>  	{ P_DSI0_PHY_PLL_OUT_BYTECLK, 2 },
>  	/* { P_GPLL0_OUT_AUX, 3 }, */
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_6[] = {
>  	"cxo",
>  	"dsi0pllbyte",
>  	/* "gpll0_out_aux", */
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_7[] = {
> @@ -140,7 +126,6 @@ static const struct parent_map gcc_parent_map_7[] = {
>  	{ P_GPLL3_OUT_MAIN, 2 },
>  	{ P_GPLL6_OUT_AUX, 3 },
>  	/* { P_GPLL4_OUT_AUX, 4 }, */
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_7[] = {
> @@ -149,19 +134,16 @@ static const char * const gcc_parent_names_7[] = {
>  	"gpll3_out_main",
>  	"gpll6_out_aux",
>  	/* "gpll4_out_aux", */
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_8[] = {
>  	{ P_XO, 0 },
>  	{ P_HDMI_PHY_PLL_CLK, 1 },
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_8[] = {
>  	"cxo",
>  	"hdmi_pll",
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_9[] = {
> @@ -169,7 +151,6 @@ static const struct parent_map gcc_parent_map_9[] = {
>  	{ P_GPLL0_OUT_MAIN, 1 },
>  	{ P_DSI0_PHY_PLL_OUT_DSICLK, 2 },
>  	{ P_GPLL6_OUT_AUX, 3 },
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_9[] = {
> @@ -177,45 +158,38 @@ static const char * const gcc_parent_names_9[] = {
>  	"gpll0_out_main",
>  	"dsi0pll",
>  	"gpll6_out_aux",
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_10[] = {
>  	{ P_XO, 0 },
>  	{ P_SLEEP_CLK, 1 },
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_10[] = {
>  	"cxo",
>  	"sleep_clk",
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_11[] = {
>  	{ P_XO, 0 },
>  	{ P_PCIE_0_PIPE_CLK, 1 },
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_11[] = {
>  	"cxo",
>  	"pcie_0_pipe_clk",
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_12[] = {
>  	{ P_XO, 0 },
>  	{ P_DSI0_PHY_PLL_OUT_DSICLK, 1 },
>  	/* { P_GPLL0_OUT_AUX, 2 }, */
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_12[] = {
>  	"cxo",
>  	"dsi0pll",
>  	/* "gpll0_out_aux", */
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_13[] = {
> @@ -223,7 +197,6 @@ static const struct parent_map gcc_parent_map_13[] = {
>  	{ P_GPLL0_OUT_MAIN, 1 },
>  	{ P_GPLL4_OUT_MAIN, 2 },
>  	{ P_GPLL6_OUT_AUX, 3 },
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_13[] = {
> @@ -231,47 +204,40 @@ static const char * const gcc_parent_names_13[] = {
>  	"gpll0_out_main",
>  	"gpll4_out_main",
>  	"gpll6_out_aux",
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_14[] = {
>  	{ P_XO, 0 },
>  	{ P_GPLL0_OUT_MAIN, 1 },
>  	/* { P_GPLL4_OUT_AUX, 2 }, */
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_14[] = {
>  	"cxo",
>  	"gpll0_out_main",
>  	/* "gpll4_out_aux", */
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_15[] = {
>  	{ P_XO, 0 },
>  	/* { P_GPLL0_OUT_AUX, 2 }, */
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_15[] = {
>  	"cxo",
>  	/* "gpll0_out_aux", */
> -	"core_bi_pll_test_se",
>  };
>  
>  static const struct parent_map gcc_parent_map_16[] = {
>  	{ P_XO, 0 },
>  	{ P_GPLL0_OUT_MAIN, 1 },
>  	/* { P_GPLL0_OUT_AUX, 2 }, */
> -	{ P_CORE_BI_PLL_TEST_SE, 7 },
>  };
>  
>  static const char * const gcc_parent_names_16[] = {
>  	"cxo",
>  	"gpll0_out_main",
>  	/* "gpll0_out_aux", */
> -	"core_bi_pll_test_se",
>  };
>  
>  static struct clk_fixed_factor cxo = {
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
index 5636c6524d0f..fb94c57a00af 100644
--- a/drivers/clk/qcom/gcc-qcs404.c
+++ b/drivers/clk/qcom/gcc-qcs404.c
@@ -22,7 +22,6 @@ 
 #include "reset.h"
 
 enum {
-	P_CORE_BI_PLL_TEST_SE,
 	P_DSI0_PHY_PLL_OUT_BYTECLK,
 	P_DSI0_PHY_PLL_OUT_DSICLK,
 	/* P_GPLL0_OUT_AUX, */
@@ -41,29 +40,24 @@  enum {
 static const struct parent_map gcc_parent_map_0[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0_OUT_MAIN, 1 },
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_0[] = {
 	"cxo",
 	"gpll0_out_main",
-	"core_bi_pll_test_se",
 };
 
 static const char * const gcc_parent_names_ao_0[] = {
 	"cxo",
 	"gpll0_ao_out_main",
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_1[] = {
 	{ P_XO, 0 },
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_1[] = {
 	"cxo",
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_2[] = {
@@ -84,54 +78,46 @@  static const struct parent_map gcc_parent_map_3[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0_OUT_MAIN, 1 },
 	{ P_GPLL6_OUT_AUX, 2 },
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_3[] = {
 	"cxo",
 	"gpll0_out_main",
 	"gpll6_out_aux",
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_4[] = {
 	{ P_XO, 0 },
 	{ P_GPLL1_OUT_MAIN, 1 },
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_4[] = {
 	"cxo",
 	"gpll1_out_main",
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_5[] = {
 	{ P_XO, 0 },
 	{ P_DSI0_PHY_PLL_OUT_BYTECLK, 1 },
 	/* { P_GPLL0_OUT_AUX, 2 }, */
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_5[] = {
 	"cxo",
 	"dsi0pllbyte",
 	/* "gpll0_out_aux", */
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_6[] = {
 	{ P_XO, 0 },
 	{ P_DSI0_PHY_PLL_OUT_BYTECLK, 2 },
 	/* { P_GPLL0_OUT_AUX, 3 }, */
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_6[] = {
 	"cxo",
 	"dsi0pllbyte",
 	/* "gpll0_out_aux", */
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_7[] = {
@@ -140,7 +126,6 @@  static const struct parent_map gcc_parent_map_7[] = {
 	{ P_GPLL3_OUT_MAIN, 2 },
 	{ P_GPLL6_OUT_AUX, 3 },
 	/* { P_GPLL4_OUT_AUX, 4 }, */
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_7[] = {
@@ -149,19 +134,16 @@  static const char * const gcc_parent_names_7[] = {
 	"gpll3_out_main",
 	"gpll6_out_aux",
 	/* "gpll4_out_aux", */
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_8[] = {
 	{ P_XO, 0 },
 	{ P_HDMI_PHY_PLL_CLK, 1 },
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_8[] = {
 	"cxo",
 	"hdmi_pll",
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_9[] = {
@@ -169,7 +151,6 @@  static const struct parent_map gcc_parent_map_9[] = {
 	{ P_GPLL0_OUT_MAIN, 1 },
 	{ P_DSI0_PHY_PLL_OUT_DSICLK, 2 },
 	{ P_GPLL6_OUT_AUX, 3 },
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_9[] = {
@@ -177,45 +158,38 @@  static const char * const gcc_parent_names_9[] = {
 	"gpll0_out_main",
 	"dsi0pll",
 	"gpll6_out_aux",
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_10[] = {
 	{ P_XO, 0 },
 	{ P_SLEEP_CLK, 1 },
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_10[] = {
 	"cxo",
 	"sleep_clk",
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_11[] = {
 	{ P_XO, 0 },
 	{ P_PCIE_0_PIPE_CLK, 1 },
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_11[] = {
 	"cxo",
 	"pcie_0_pipe_clk",
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_12[] = {
 	{ P_XO, 0 },
 	{ P_DSI0_PHY_PLL_OUT_DSICLK, 1 },
 	/* { P_GPLL0_OUT_AUX, 2 }, */
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_12[] = {
 	"cxo",
 	"dsi0pll",
 	/* "gpll0_out_aux", */
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_13[] = {
@@ -223,7 +197,6 @@  static const struct parent_map gcc_parent_map_13[] = {
 	{ P_GPLL0_OUT_MAIN, 1 },
 	{ P_GPLL4_OUT_MAIN, 2 },
 	{ P_GPLL6_OUT_AUX, 3 },
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_13[] = {
@@ -231,47 +204,40 @@  static const char * const gcc_parent_names_13[] = {
 	"gpll0_out_main",
 	"gpll4_out_main",
 	"gpll6_out_aux",
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_14[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0_OUT_MAIN, 1 },
 	/* { P_GPLL4_OUT_AUX, 2 }, */
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_14[] = {
 	"cxo",
 	"gpll0_out_main",
 	/* "gpll4_out_aux", */
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_15[] = {
 	{ P_XO, 0 },
 	/* { P_GPLL0_OUT_AUX, 2 }, */
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_15[] = {
 	"cxo",
 	/* "gpll0_out_aux", */
-	"core_bi_pll_test_se",
 };
 
 static const struct parent_map gcc_parent_map_16[] = {
 	{ P_XO, 0 },
 	{ P_GPLL0_OUT_MAIN, 1 },
 	/* { P_GPLL0_OUT_AUX, 2 }, */
-	{ P_CORE_BI_PLL_TEST_SE, 7 },
 };
 
 static const char * const gcc_parent_names_16[] = {
 	"cxo",
 	"gpll0_out_main",
 	/* "gpll0_out_aux", */
-	"core_bi_pll_test_se",
 };
 
 static struct clk_fixed_factor cxo = {