| Message ID | 20221227013225.2847382-8-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | clock: qcom: apq8084: convert to parent_data/_hws | expand |
On 27.12.2022 02:32, Dmitry Baryshkov wrote: > Add the GCC_MMSS_GPLL0_CLK_SRC, the branch clock gating gpll0 clock for > the multimedia subsystem. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- I'm thinking whether it would maybe make sense to put 8974 and 8084 clocks in a single driver.. They seem close to identical. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > drivers/clk/qcom/gcc-apq8084.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c > index c26e222c78d4..7085d2ccae49 100644 > --- a/drivers/clk/qcom/gcc-apq8084.c > +++ b/drivers/clk/qcom/gcc-apq8084.c > @@ -1382,6 +1382,19 @@ static struct clk_rcg2 usb_hsic_system_clk_src = { > }, > }; > > +static struct clk_regmap gcc_mmss_gpll0_clk_src = { > + .enable_reg = 0x1484, > + .enable_mask = BIT(26), > + .hw.init = &(struct clk_init_data){ > + .name = "mmss_gpll0_vote", > + .parent_hws = (const struct clk_hw*[]){ > + &gpll0_vote.hw, > + }, > + .num_parents = 1, > + .ops = &clk_branch_simple_ops, > + }, > +}; > + > static struct clk_branch gcc_bam_dma_ahb_clk = { > .halt_reg = 0x0d44, > .halt_check = BRANCH_HALT_VOTED, > @@ -3480,6 +3493,7 @@ static struct clk_regmap *gcc_apq8084_clocks[] = { > [GCC_USB_HSIC_IO_CAL_SLEEP_CLK] = &gcc_usb_hsic_io_cal_sleep_clk.clkr, > [GCC_USB_HSIC_MOCK_UTMI_CLK] = &gcc_usb_hsic_mock_utmi_clk.clkr, > [GCC_USB_HSIC_SYSTEM_CLK] = &gcc_usb_hsic_system_clk.clkr, > + [GCC_MMSS_GPLL0_CLK_SRC] = &gcc_mmss_gpll0_clk_src, > }; > > static struct gdsc *gcc_apq8084_gdscs[] = {
On Tue, 27 Dec 2022 at 13:58, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > > > On 27.12.2022 02:32, Dmitry Baryshkov wrote: > > Add the GCC_MMSS_GPLL0_CLK_SRC, the branch clock gating gpll0 clock for > > the multimedia subsystem. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > I'm thinking whether it would maybe make sense to put 8974 > and 8084 clocks in a single driver.. They seem close to identical. Unfortunately the bindings are quite different. So even if we pack both gcc drivers into a single one, we'd still have to cope with different numeric ids. The only sensible solution that I have in mind is to have a common C file, containing common clock definitions. > > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > Konrad > > drivers/clk/qcom/gcc-apq8084.c | 14 ++++++++++++++ > > 1 file changed, 14 insertions(+) > > > > diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c > > index c26e222c78d4..7085d2ccae49 100644 > > --- a/drivers/clk/qcom/gcc-apq8084.c > > +++ b/drivers/clk/qcom/gcc-apq8084.c > > @@ -1382,6 +1382,19 @@ static struct clk_rcg2 usb_hsic_system_clk_src = { > > }, > > }; > > > > +static struct clk_regmap gcc_mmss_gpll0_clk_src = { > > + .enable_reg = 0x1484, > > + .enable_mask = BIT(26), > > + .hw.init = &(struct clk_init_data){ > > + .name = "mmss_gpll0_vote", > > + .parent_hws = (const struct clk_hw*[]){ > > + &gpll0_vote.hw, > > + }, > > + .num_parents = 1, > > + .ops = &clk_branch_simple_ops, > > + }, > > +}; > > + > > static struct clk_branch gcc_bam_dma_ahb_clk = { > > .halt_reg = 0x0d44, > > .halt_check = BRANCH_HALT_VOTED, > > @@ -3480,6 +3493,7 @@ static struct clk_regmap *gcc_apq8084_clocks[] = { > > [GCC_USB_HSIC_IO_CAL_SLEEP_CLK] = &gcc_usb_hsic_io_cal_sleep_clk.clkr, > > [GCC_USB_HSIC_MOCK_UTMI_CLK] = &gcc_usb_hsic_mock_utmi_clk.clkr, > > [GCC_USB_HSIC_SYSTEM_CLK] = &gcc_usb_hsic_system_clk.clkr, > > + [GCC_MMSS_GPLL0_CLK_SRC] = &gcc_mmss_gpll0_clk_src, > > }; > > > > static struct gdsc *gcc_apq8084_gdscs[] = {
On 27.12.2022 13:17, Dmitry Baryshkov wrote: > On Tue, 27 Dec 2022 at 13:58, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: >> >> >> >> On 27.12.2022 02:32, Dmitry Baryshkov wrote: >>> Add the GCC_MMSS_GPLL0_CLK_SRC, the branch clock gating gpll0 clock for >>> the multimedia subsystem. >>> >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >>> --- >> I'm thinking whether it would maybe make sense to put 8974 >> and 8084 clocks in a single driver.. They seem close to identical. > > Unfortunately the bindings are quite different. So even if we pack > both gcc drivers into a single one, we'd still have to cope with > different numeric ids. > The only sensible solution that I have in mind is to have a common C > file, containing common clock definitions. Right, let's forget it then. Konrad > >> >> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> >> Konrad >>> drivers/clk/qcom/gcc-apq8084.c | 14 ++++++++++++++ >>> 1 file changed, 14 insertions(+) >>> >>> diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c >>> index c26e222c78d4..7085d2ccae49 100644 >>> --- a/drivers/clk/qcom/gcc-apq8084.c >>> +++ b/drivers/clk/qcom/gcc-apq8084.c >>> @@ -1382,6 +1382,19 @@ static struct clk_rcg2 usb_hsic_system_clk_src = { >>> }, >>> }; >>> >>> +static struct clk_regmap gcc_mmss_gpll0_clk_src = { >>> + .enable_reg = 0x1484, >>> + .enable_mask = BIT(26), >>> + .hw.init = &(struct clk_init_data){ >>> + .name = "mmss_gpll0_vote", >>> + .parent_hws = (const struct clk_hw*[]){ >>> + &gpll0_vote.hw, >>> + }, >>> + .num_parents = 1, >>> + .ops = &clk_branch_simple_ops, >>> + }, >>> +}; >>> + >>> static struct clk_branch gcc_bam_dma_ahb_clk = { >>> .halt_reg = 0x0d44, >>> .halt_check = BRANCH_HALT_VOTED, >>> @@ -3480,6 +3493,7 @@ static struct clk_regmap *gcc_apq8084_clocks[] = { >>> [GCC_USB_HSIC_IO_CAL_SLEEP_CLK] = &gcc_usb_hsic_io_cal_sleep_clk.clkr, >>> [GCC_USB_HSIC_MOCK_UTMI_CLK] = &gcc_usb_hsic_mock_utmi_clk.clkr, >>> [GCC_USB_HSIC_SYSTEM_CLK] = &gcc_usb_hsic_system_clk.clkr, >>> + [GCC_MMSS_GPLL0_CLK_SRC] = &gcc_mmss_gpll0_clk_src, >>> }; >>> >>> static struct gdsc *gcc_apq8084_gdscs[] = { > > >
diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c index c26e222c78d4..7085d2ccae49 100644 --- a/drivers/clk/qcom/gcc-apq8084.c +++ b/drivers/clk/qcom/gcc-apq8084.c @@ -1382,6 +1382,19 @@ static struct clk_rcg2 usb_hsic_system_clk_src = { }, }; +static struct clk_regmap gcc_mmss_gpll0_clk_src = { + .enable_reg = 0x1484, + .enable_mask = BIT(26), + .hw.init = &(struct clk_init_data){ + .name = "mmss_gpll0_vote", + .parent_hws = (const struct clk_hw*[]){ + &gpll0_vote.hw, + }, + .num_parents = 1, + .ops = &clk_branch_simple_ops, + }, +}; + static struct clk_branch gcc_bam_dma_ahb_clk = { .halt_reg = 0x0d44, .halt_check = BRANCH_HALT_VOTED, @@ -3480,6 +3493,7 @@ static struct clk_regmap *gcc_apq8084_clocks[] = { [GCC_USB_HSIC_IO_CAL_SLEEP_CLK] = &gcc_usb_hsic_io_cal_sleep_clk.clkr, [GCC_USB_HSIC_MOCK_UTMI_CLK] = &gcc_usb_hsic_mock_utmi_clk.clkr, [GCC_USB_HSIC_SYSTEM_CLK] = &gcc_usb_hsic_system_clk.clkr, + [GCC_MMSS_GPLL0_CLK_SRC] = &gcc_mmss_gpll0_clk_src, }; static struct gdsc *gcc_apq8084_gdscs[] = {
Add the GCC_MMSS_GPLL0_CLK_SRC, the branch clock gating gpll0 clock for the multimedia subsystem. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/clk/qcom/gcc-apq8084.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+)