| Message ID | 20221228140917.118861-1-krzysztof.kozlowski@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 3db8732c55c0109ea3a9ff9cadc10871eaba058c |
| Headers | show |
| Series | [1/3] dt-bindings: clock: qcom,gcc-sm8350: drop core_bi_pll_test_se input | expand |
On Wed, 28 Dec 2022 15:09:15 +0100, Krzysztof Kozlowski wrote: > Drop unused core_bi_pll_test_se clock input to the clock controller. > > Applied, thanks! [1/3] dt-bindings: clock: qcom,gcc-sm8350: drop core_bi_pll_test_se input commit: 3db8732c55c0109ea3a9ff9cadc10871eaba058c [2/3] clk: gcc-sm8150: drop PLL test clock commit: 412df0f95a528dcafd7b21a711ca5deffca68db9 [3/3] clk: gcc-sm8350: drop PLL test clock commit: e35b4b9e8353df22c2f3dfa01631af79d0f44d59 Best regards,
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml index 703d9e075247..b4fdde71ef18 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml @@ -23,7 +23,6 @@ properties: items: - description: Board XO source - description: Sleep clock source - - description: PLL test clock source (Optional clock) - description: PCIE 0 Pipe clock source (Optional clock) - description: PCIE 1 Pipe clock source (Optional clock) - description: UFS card Rx symbol 0 clock source (Optional clock) @@ -40,7 +39,6 @@ properties: items: - const: bi_tcxo - const: sleep_clk - - const: core_bi_pll_test_se # Optional clock - const: pcie_0_pipe_clk # Optional clock - const: pcie_1_pipe_clk # Optional clock - const: ufs_card_rx_symbol_0_clk # Optional clock
Drop unused core_bi_pll_test_se clock input to the clock controller. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml | 2 -- 1 file changed, 2 deletions(-)