Message ID | 20230102085452.10753-1-krzysztof.kozlowski@linaro.org (mailing list archive) |
---|---|
State | Accepted |
Commit | ac392971357375bbbba905c6c12cd1ac6962da2d |
Headers | show |
Series | [v2,1/6] arm64: dts: qcom: sc8280xp: align PSCI domain names with DT schema | expand |
On Mon, 2 Jan 2023 09:54:47 +0100, Krzysztof Kozlowski wrote: > Bindings expect power domains to follow generic naming pattern: > > sc8280xp-crd.dtb: psci: 'cpu-cluster0', 'cpu0', 'cpu1', 'cpu2', 'cpu3', 'cpu4', 'cpu5', 'cpu6', > 'cpu7' do not match any of the regexes: '^power-domain-', 'pinctrl-[0-9]+' > > Applied, thanks! [1/6] arm64: dts: qcom: sc8280xp: align PSCI domain names with DT schema commit: ac392971357375bbbba905c6c12cd1ac6962da2d [2/6] arm64: dts: qcom: sm6375: align PSCI domain names with DT schema commit: 0c8bfc7f3be4d99fc314676210c77838aa282cd6 [3/6] arm64: dts: qcom: sm8150: align PSCI domain names with DT schema commit: 5ca45690551a304c7bc8996962315f2e8b2909d8 [4/6] arm64: dts: qcom: sm8250: align PSCI domain names with DT schema commit: 56d590022b6c6baea11e3a9f6106fddafaba8a58 [5/6] arm64: dts: qcom: sm8350: align PSCI domain names with DT schema commit: a9371962c3b26ba4012dc05ab0fbb964eb142a66 [6/6] arm64: dts: qcom: sm8450: align PSCI domain names with DT schema commit: fce310a2d2321874423b11f6cab4ad3fce5ef639 Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 89004cb657e0..84459dbd1604 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -537,55 +537,55 @@ psci { compatible = "arm,psci-1.0"; method = "smc"; - CPU_PD0: cpu0 { + CPU_PD0: power-domain-cpu0 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&LITTLE_CPU_SLEEP_0>; }; - CPU_PD1: cpu1 { + CPU_PD1: power-domain-cpu1 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&LITTLE_CPU_SLEEP_0>; }; - CPU_PD2: cpu2 { + CPU_PD2: power-domain-cpu2 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&LITTLE_CPU_SLEEP_0>; }; - CPU_PD3: cpu3 { + CPU_PD3: power-domain-cpu3 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&LITTLE_CPU_SLEEP_0>; }; - CPU_PD4: cpu4 { + CPU_PD4: power-domain-cpu4 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&BIG_CPU_SLEEP_0>; }; - CPU_PD5: cpu5 { + CPU_PD5: power-domain-cpu5 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&BIG_CPU_SLEEP_0>; }; - CPU_PD6: cpu6 { + CPU_PD6: power-domain-cpu6 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&BIG_CPU_SLEEP_0>; }; - CPU_PD7: cpu7 { + CPU_PD7: power-domain-cpu7 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&BIG_CPU_SLEEP_0>; }; - CLUSTER_PD: cpu-cluster0 { + CLUSTER_PD: power-domain-cpu-cluster0 { #power-domain-cells = <0>; domain-idle-states = <&CLUSTER_SLEEP_0>; };