From patchwork Mon Jan 2 09:46:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13086617 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFC15C63705 for ; Mon, 2 Jan 2023 09:48:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232564AbjABJrz (ORCPT ); Mon, 2 Jan 2023 04:47:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232512AbjABJrC (ORCPT ); Mon, 2 Jan 2023 04:47:02 -0500 Received: from mail-lj1-x22e.google.com (mail-lj1-x22e.google.com [IPv6:2a00:1450:4864:20::22e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA2115F4C for ; Mon, 2 Jan 2023 01:46:52 -0800 (PST) Received: by mail-lj1-x22e.google.com with SMTP id i19so15704119ljg.8 for ; Mon, 02 Jan 2023 01:46:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=U0Gtnc7vcqrgpY3S5KTeCd8H/ZqD0S93TfnNyC/PPRM=; b=lZM+dn3TEoTPn5yHhE84UpSSM428YWIu/T7sawMCKuLumD4s24qkXhMazjLA9zLQMo AAK0qczEka0aWXqpGQ8DEd+KUf5dPz80OmNIMv6mgItj4Uq5ucbuq3nImMmutWYolkng ZCRQt87KMEMShD21Sxz4WSTAtbcHRXaPUYUtwZQj0Soc6ZGcH6RAeNe1j/eOLm//rZYQ w+kCvrE1MXvNSJfUPYEdCRcqHbNzPdgwnNX6wwbz95+CP9MdI3lTP43cDe2KGr36nhKW poE95y29VePo1q+A/GulhrmFTMe8ajn1E2zt5cjpd/1LqYN5tou1JYH6KykKWzNtEPqF bENQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=U0Gtnc7vcqrgpY3S5KTeCd8H/ZqD0S93TfnNyC/PPRM=; b=Cyd++CXRHkkj5HJAgpVr5ktGQFnHO+hLgMJ+sUNhrwryCxRhdXLWkapXtGYhmTehaO HudewKHhc2sRg9mQBIKAlvcyTAbOv81Q30VYpv1dEMhc+/A/vddDU8Rp3Jq7IrixpnGT YGYIFmmKeVVfT1kVoZ1wyS7LsgfNL0QBrFB2c8gh57dC0cA+xwNoD1ItBGy30Y1JT/gw 6Pq1Qo5iIkamMgXPGEpVlabaau5HDAb1uYHTD5/K0dra0DlQm82hAZu4zjsYRIO00sTQ MQH+W5DHId1Z/OS1cmf/e5bJMqfBXQJ428rXcl4ldIIaxOqDdGkcRBEOuXkbg+R+YAW8 qMdw== X-Gm-Message-State: AFqh2kqGChVTLQ3Ri7Cqz/qgV1RiLOOQ2CX6pMIpVqcdP9r0QAHfq7Wt OHmW89d6CTpQCQ0q6WGDiubVgMDyxwnugxl3 X-Google-Smtp-Source: AMrXdXvJIj1uGAhTI+tYfyG9LC/zoppxPN2+vVYhgePNTmmB/9OS6kEpz5j9kKbYLFGE6iES1VlFcQ== X-Received: by 2002:a05:651c:228:b0:279:7ecb:897f with SMTP id z8-20020a05651c022800b002797ecb897fmr10533062ljn.28.1672652810911; Mon, 02 Jan 2023 01:46:50 -0800 (PST) Received: from localhost.localdomain (abxi45.neoplus.adsl.tpnet.pl. [83.9.2.45]) by smtp.gmail.com with ESMTPSA id x11-20020a0565123f8b00b004b5adb59ed5sm4382143lfa.297.2023.01.02.01.46.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Jan 2023 01:46:50 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 04/17] arm64: dts: qcom: ipq6018: Add/remove some newlines Date: Mon, 2 Jan 2023 10:46:29 +0100 Message-Id: <20230102094642.74254-5-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230102094642.74254-1-konrad.dybcio@linaro.org> References: <20230102094642.74254-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Some lines were broken very aggresively, presumably to fit under 80 chars and some places could have used a newline, particularly between subsequent nodes. Address all that and remove redundant comments near PCIe ranges while at it so as not to exceed 100 chars needlessly. Signed-off-by: Konrad Dybcio --- v1 -> v2: No changes arch/arm64/boot/dts/qcom/ipq6018.dtsi | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 8937b10748f3..0d9074b3b1a2 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -102,26 +102,31 @@ opp-864000000 { opp-microvolt = <725000>; clock-latency-ns = <200000>; }; + opp-1056000000 { opp-hz = /bits/ 64 <1056000000>; opp-microvolt = <787500>; clock-latency-ns = <200000>; }; + opp-1320000000 { opp-hz = /bits/ 64 <1320000000>; opp-microvolt = <862500>; clock-latency-ns = <200000>; }; + opp-1440000000 { opp-hz = /bits/ 64 <1440000000>; opp-microvolt = <925000>; clock-latency-ns = <200000>; }; + opp-1608000000 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <987500>; clock-latency-ns = <200000>; }; + opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1062500>; @@ -131,8 +136,7 @@ opp-1800000000 { pmuv8: pmu { compatible = "arm,cortex-a53-pmu"; - interrupts = ; + interrupts = ; }; psci: psci { @@ -734,24 +738,18 @@ pcie0: pci@20000000 { phys = <&pcie_phy0>; phy-names = "pciephy"; - ranges = <0x81000000 0 0x20200000 0 0x20200000 - 0 0x10000>, /* downstream I/O */ - <0x82000000 0 0x20220000 0 0x20220000 - 0 0xfde0000>; /* non-prefetchable memory */ + ranges = <0x81000000 0 0x20200000 0 0x20200000 0 0x10000>, + <0x82000000 0 0x20220000 0 0x20220000 0 0xfde0000>; interrupts = ; interrupt-names = "msi"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 75 - IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 78 - IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 79 - IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 83 - IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + interrupt-map = <0 0 0 1 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, <&gcc GCC_PCIE0_AXI_M_CLK>,