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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id c25-20020ac25f79000000b00494643db68fsm1317493lfc.81.2023.01.08.16.52.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Jan 2023 16:52:12 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 3/4] drm/msm/mdss: check for core clk before accessing HW_REV Date: Mon, 9 Jan 2023 02:52:08 +0200 Message-Id: <20230109005209.247356-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230109005209.247356-1-dmitry.baryshkov@linaro.org> References: <20230109005209.247356-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Rather than checking whether the platform is an mdp5 or dpu platform, check if the MDP_CLK is provided or not before trying to access HW_REV (and skip reading the registers if the clock is not provided by the DT). Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index c3364f85c148..ce554f2c2e02 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -35,7 +35,6 @@ struct msm_mdss { void __iomem *mmio; struct clk_bulk_data *clocks; size_t num_clocks; - bool is_mdp5; struct { unsigned long enabled_mask; struct irq_domain *domain; @@ -230,6 +229,19 @@ static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss, } } +static bool msm_mdss_has_clock(struct msm_mdss *msm_mdss, const char *name) +{ + unsigned int i; + + for (i = 0; i < msm_mdss->num_clocks; i++) { + if (!strcmp(msm_mdss->clocks[i].id, name) && + msm_mdss->clocks[i].clk) + return true; + } + + return false; +} + static int msm_mdss_enable(struct msm_mdss *msm_mdss) { int ret; @@ -249,10 +261,11 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) } /* - * HW_REV requires MDSS_MDP_CLK, which is not enabled by the mdss on - * mdp5 hardware. Skip reading it for now. + * HW_REV requires MDSS_MDP_CLK, which is not used for MDSS device in + * older device trees. Skip accessing registers if the clock is not + * present. */ - if (msm_mdss->is_mdp5) + if (!msm_mdss_has_clock(msm_mdss, "core")) return 0; hw_rev = readl_relaxed(msm_mdss->mmio + HW_REV); @@ -419,7 +432,6 @@ static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5 return ERR_PTR(ret); } msm_mdss->num_clocks = ret; - msm_mdss->is_mdp5 = is_mdp5; msm_mdss->dev = &pdev->dev;