diff mbox series

[v3,07/12] clk: qcom: gcc-apq8084: add GCC_MMSS_GPLL0_CLK_SRC

Message ID 20230111060402.1168726-8-dmitry.baryshkov@linaro.org (mailing list archive)
State Accepted
Headers show
Series clock: qcom: apq8084: convert to parent_data/_hws | expand

Commit Message

Dmitry Baryshkov Jan. 11, 2023, 6:03 a.m. UTC
Add the GCC_MMSS_GPLL0_CLK_SRC, the branch clock gating gpll0 clock for
the multimedia subsystem.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/clk/qcom/gcc-apq8084.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Stephen Boyd Jan. 25, 2023, 9:50 p.m. UTC | #1
Quoting Dmitry Baryshkov (2023-01-10 22:03:57)
> Add the GCC_MMSS_GPLL0_CLK_SRC, the branch clock gating gpll0 clock for
> the multimedia subsystem.
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Does all hell break loose if this is ever turned off?
Dmitry Baryshkov Jan. 26, 2023, 8:25 a.m. UTC | #2
On 25/01/2023 23:50, Stephen Boyd wrote:
> Quoting Dmitry Baryshkov (2023-01-10 22:03:57)
>> Add the GCC_MMSS_GPLL0_CLK_SRC, the branch clock gating gpll0 clock for
>> the multimedia subsystem.
>>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> Does all hell break loose if this is ever turned off?

Good question. This is just a c&p from msm8974, which employs the 
similar combo of gcc and mmcc. I suspect that the answer is no, as we 
are still in world of alive people :D
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c
index c26e222c78d4..7085d2ccae49 100644
--- a/drivers/clk/qcom/gcc-apq8084.c
+++ b/drivers/clk/qcom/gcc-apq8084.c
@@ -1382,6 +1382,19 @@  static struct clk_rcg2 usb_hsic_system_clk_src = {
 	},
 };
 
+static struct clk_regmap gcc_mmss_gpll0_clk_src = {
+	.enable_reg = 0x1484,
+	.enable_mask = BIT(26),
+	.hw.init = &(struct clk_init_data){
+		.name = "mmss_gpll0_vote",
+		.parent_hws = (const struct clk_hw*[]){
+			&gpll0_vote.hw,
+		},
+		.num_parents = 1,
+		.ops = &clk_branch_simple_ops,
+	},
+};
+
 static struct clk_branch gcc_bam_dma_ahb_clk = {
 	.halt_reg = 0x0d44,
 	.halt_check = BRANCH_HALT_VOTED,
@@ -3480,6 +3493,7 @@  static struct clk_regmap *gcc_apq8084_clocks[] = {
 	[GCC_USB_HSIC_IO_CAL_SLEEP_CLK] = &gcc_usb_hsic_io_cal_sleep_clk.clkr,
 	[GCC_USB_HSIC_MOCK_UTMI_CLK] = &gcc_usb_hsic_mock_utmi_clk.clkr,
 	[GCC_USB_HSIC_SYSTEM_CLK] = &gcc_usb_hsic_system_clk.clkr,
+	[GCC_MMSS_GPLL0_CLK_SRC] = &gcc_mmss_gpll0_clk_src,
 };
 
 static struct gdsc *gcc_apq8084_gdscs[] = {