| Message ID | 20230124192351.695838-2-ahalaney@redhat.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/2] arm64: dts: qcom: sa8540p-ride: Fix some i2c pinctrl settings | expand |
On 24.01.2023 20:23, Andrew Halaney wrote: > It isn't obvious in the current devicetree what is connected. Go ahead > and document what's on the other end. > > Signed-off-by: Andrew Halaney <ahalaney@redhat.com> > --- Other boards do similar things under the i2c host nodes (see e.g. sm8450-sony-xperia-nagara.dtsi.. > > Not sure if this sort of patch is actually welcomed or not but I went > through this exercise (for the prior patch) and thought it might be > useful to document. ..and yes it is very welcome! > > Shazad, this also highlights (unless I misread things) that i2c12 has no > use for us, right? If agreed I can remove it but sorting through the > lore links that provided all this it seems like at the time it was > desired to be added. It's fine if you guys decide that it's useful for some kind expansion mezzanine or other add-on board, but if it's not connected anywhere you may wish to disable the host and remove the pinctrl entries, as keeping it enabled essentially wastes some power. Konrad > > Thanks, > Andrew > > arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > index cb9fbdeb5a9e..3478ab91fe73 100644 > --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > @@ -317,6 +317,7 @@ &xo_board_clk { > > &tlmm { > i2c0_default: i2c0-default-state { > + /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ > pins = "gpio135", "gpio136"; > function = "qup0"; > drive-strength = <2>; > @@ -324,6 +325,7 @@ i2c0_default: i2c0-default-state { > }; > > i2c1_default: i2c1-default-state { > + /* To PM40028B-F3EI PCIe switch */ > pins = "gpio158", "gpio159"; > function = "qup1"; > drive-strength = <2>; > @@ -331,6 +333,7 @@ i2c1_default: i2c1-default-state { > }; > > i2c12_default: i2c12-default-state { > + /* Not connected */ > pins = "gpio0", "gpio1"; > function = "qup12"; > drive-strength = <2>; > @@ -338,6 +341,7 @@ i2c12_default: i2c12-default-state { > }; > > i2c15_default: i2c15-default-state { > + /* To display connector (SIP1 only) */ > pins = "gpio36", "gpio37"; > function = "qup15"; > drive-strength = <2>; > @@ -345,6 +349,7 @@ i2c15_default: i2c15-default-state { > }; > > i2c18_default: i2c18-default-state { > + /* To ASM330LHH IMU (SIP1 only) */ > pins = "gpio66", "gpio67"; > function = "qup18"; > drive-strength = <2>;
On 1/25/2023 12:53 AM, Andrew Halaney wrote: > It isn't obvious in the current devicetree what is connected. Go ahead > and document what's on the other end. > > Signed-off-by: Andrew Halaney <ahalaney@redhat.com> > --- > > Not sure if this sort of patch is actually welcomed or not but I went > through this exercise (for the prior patch) and thought it might be > useful to document. > > Shazad, this also highlights (unless I misread things) that i2c12 has no > use for us, right? If agreed I can remove it but sorting through the > lore links that provided all this it seems like at the time it was > desired to be added. > Andrew, i2c12 has GPU PWR ctl use case, so let's keep it enabled. -Shazad > Thanks, > Andrew > > arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > index cb9fbdeb5a9e..3478ab91fe73 100644 > --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts > @@ -317,6 +317,7 @@ &xo_board_clk { > > &tlmm { > i2c0_default: i2c0-default-state { > + /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ > pins = "gpio135", "gpio136"; > function = "qup0"; > drive-strength = <2>; > @@ -324,6 +325,7 @@ i2c0_default: i2c0-default-state { > }; > > i2c1_default: i2c1-default-state { > + /* To PM40028B-F3EI PCIe switch */ > pins = "gpio158", "gpio159"; > function = "qup1"; > drive-strength = <2>; > @@ -331,6 +333,7 @@ i2c1_default: i2c1-default-state { > }; > > i2c12_default: i2c12-default-state { > + /* Not connected */ > pins = "gpio0", "gpio1"; > function = "qup12"; > drive-strength = <2>; > @@ -338,6 +341,7 @@ i2c12_default: i2c12-default-state { > }; > > i2c15_default: i2c15-default-state { > + /* To display connector (SIP1 only) */ > pins = "gpio36", "gpio37"; > function = "qup15"; > drive-strength = <2>; > @@ -345,6 +349,7 @@ i2c15_default: i2c15-default-state { > }; > > i2c18_default: i2c18-default-state { > + /* To ASM330LHH IMU (SIP1 only) */ > pins = "gpio66", "gpio67"; > function = "qup18"; > drive-strength = <2>;
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index cb9fbdeb5a9e..3478ab91fe73 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -317,6 +317,7 @@ &xo_board_clk { &tlmm { i2c0_default: i2c0-default-state { + /* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */ pins = "gpio135", "gpio136"; function = "qup0"; drive-strength = <2>; @@ -324,6 +325,7 @@ i2c0_default: i2c0-default-state { }; i2c1_default: i2c1-default-state { + /* To PM40028B-F3EI PCIe switch */ pins = "gpio158", "gpio159"; function = "qup1"; drive-strength = <2>; @@ -331,6 +333,7 @@ i2c1_default: i2c1-default-state { }; i2c12_default: i2c12-default-state { + /* Not connected */ pins = "gpio0", "gpio1"; function = "qup12"; drive-strength = <2>; @@ -338,6 +341,7 @@ i2c12_default: i2c12-default-state { }; i2c15_default: i2c15-default-state { + /* To display connector (SIP1 only) */ pins = "gpio36", "gpio37"; function = "qup15"; drive-strength = <2>; @@ -345,6 +349,7 @@ i2c15_default: i2c15-default-state { }; i2c18_default: i2c18-default-state { + /* To ASM330LHH IMU (SIP1 only) */ pins = "gpio66", "gpio67"; function = "qup18"; drive-strength = <2>;
It isn't obvious in the current devicetree what is connected. Go ahead and document what's on the other end. Signed-off-by: Andrew Halaney <ahalaney@redhat.com> --- Not sure if this sort of patch is actually welcomed or not but I went through this exercise (for the prior patch) and thought it might be useful to document. Shazad, this also highlights (unless I misread things) that i2c12 has no use for us, right? If agreed I can remove it but sorting through the lore links that provided all this it seems like at the time it was desired to be added. Thanks, Andrew arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +++++ 1 file changed, 5 insertions(+)