| Message ID | 20230129215136.5557-4-steev@kali.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Attempt at adding WCN6855 BT support | expand |
On Sun, Jan 29, 2023 at 03:51:29PM -0600, Steev Klimaszewski wrote: > From: Bjorn Andersson <bjorn.andersson@linaro.org> > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> You should also add your Signed-off-by. Also the title of the patch should be updated to say define uart2 instead of enable BT. > --- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > index 122afa03bb40..2d98687fb1ea 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > @@ -1244,6 +1244,20 @@ spi3: spi@98c000 { > status = "disabled"; > }; > > + uart2: serial@988000 { This node needs to go after spi2 instead of spi3. Everything else looks good to me. Brian
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 122afa03bb40..2d98687fb1ea 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1244,6 +1244,20 @@ spi3: spi@98c000 { status = "disabled"; }; + uart2: serial@988000 { + compatible = "qcom,geni-uart"; + reg = <0 0x00988000 0 0x4000>; + clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; + clock-names = "se"; + interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; + operating-points-v2 = <&qup_opp_table_100mhz>; + power-domains = <&rpmhpd SC8280XP_CX>; + interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>; + interconnect-names = "qup-core", "qup-config"; + status = "disabled"; + }; + i2c4: i2c@990000 { compatible = "qcom,geni-i2c"; reg = <0 0x00990000 0 0x4000>;