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Thu, 2 Feb 2023 09:27:18 -0600 From: Amit Kumar Mahapatra To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , "Amit Kumar Mahapatra" Subject: [PATCH v3 11/13] spi: spi-zynqmp-gqspi: Add stacked memories support in GQSPI driver Date: Thu, 2 Feb 2023 20:52:56 +0530 Message-ID: <20230202152258.512973-12-amit.kumar-mahapatra@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230202152258.512973-1-amit.kumar-mahapatra@amd.com> References: <20230202152258.512973-1-amit.kumar-mahapatra@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF000108EB:EE_|LV2PR12MB6014:EE_ X-MS-Office365-Filtering-Correlation-Id: 5755075f-c6cb-419b-b21e-08db053206dd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: KoM10hG09f9b7tEjxd0eMibieSwgJNqgFCcrChc+l46WGH9wZrR4XoOzRVt4YUU2abOHjKTT3NrX+eAR/i2p0YGIADpe1nvcdW98xgumDYI7zd77jSRQCj5G5OaVDhd6CnnRPicA1yb6LTr55ay9hoku8YpHit30jUayjtt8NO/sa0S9i9lNkYwjUZqQY/IXSw3KXjt2hOhthZ1i+ZFmtToP/6O5rCoTWaTtrQmtPAT2KGOyN04h4MWXTjh8T5v0EYABN70GXPlZzFS/1uY1dibCOhxoCkxCujUjU7N0Aj3D0q4ghEICSBIt+LmlKABco2TTQZNJ/OV/7XyOKpylneN1D04125i5XF2q2uC8QRql2uHwqh5tJuDKTK5ZGp/qPD9dU3u1zQSNWo3VIBSfwr/NRGHDdIw9ZewxvSwdn7+JjTSmslicsr/GEdlOzY97Evonu4IyiMqz59KpsrDFksE+mJA/mLn5LOv2NfjLa2y+8XRqbejaDMuFPTWV9HCGpikr7r1SoPdnOOggeZZm9HMEqa8linP3e9yLSRvZtx1mV8bSCCP6mUEknDwhk2hAlCMBjXPND+2o7O8qSoA6UEcrH5mk5hTrWNcwX5LG4DxE9J06u5KOs80ehRDXkcprjR9RXmELDwSSzvMDJ/N/Ppu2lcyvrCo8+Jbc6EtDLAoUyuk12YSXbRIRihJsj70U5Rpd1s9GdGIHUb/TAYBJmrqT5gHh3lKd/eanmUUsfHad8GAgs9KjlEwawws8NI+4oRWP9sQjEoU7y0Myn6Y/iaLMKNtPFtslOCdmaYjE6cQNBacRF/YTvOMvw1N/tpZOC72KYuiI3XRt7tQqIQVrXg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(346002)(136003)(376002)(396003)(39860400002)(451199018)(46966006)(36840700001)(40470700004)(2906002)(316002)(36756003)(426003)(47076005)(82310400005)(54906003)(8676002)(6666004)(336012)(83380400001)(478600001)(186003)(40480700001)(41300700001)(40460700003)(70586007)(70206006)(26005)(921005)(1076003)(7416002)(8936002)(7336002)(7366002)(5660300002)(7406005)(356005)(4326008)(86362001)(7276002)(81166007)(36860700001)(82740400003)(2616005)(110136005)(83996005)(36900700001)(2101003)(41080700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2023 15:27:42.1784 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5755075f-c6cb-419b-b21e-08db053206dd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF000108EB.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB6014 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org GQSPI supports two chip select CS0 & CS1. Update the driver to assert/de-assert the appropriate chip select as per the bits set in qspi->cs_index_mask. Signed-off-by: Amit Kumar Mahapatra --- drivers/spi/spi-zynqmp-gqspi.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c index 319cdd5a0bdc..4759f704bf5c 100644 --- a/drivers/spi/spi-zynqmp-gqspi.c +++ b/drivers/spi/spi-zynqmp-gqspi.c @@ -156,6 +156,9 @@ #define GQSPI_FREQ_100MHZ 100000000 #define GQSPI_FREQ_150MHZ 150000000 +#define GQSPI_SELECT_LOWER_CS BIT(0) +#define GQSPI_SELECT_UPPER_CS BIT(1) + #define SPI_AUTOSUSPEND_TIMEOUT 3000 enum mode_type {GQSPI_MODE_IO, GQSPI_MODE_DMA}; @@ -467,15 +470,17 @@ static void zynqmp_qspi_chipselect(struct spi_device *qspi, bool is_high) genfifoentry |= GQSPI_GENFIFO_MODE_SPI; + if (qspi->cs_index_mask & GQSPI_SELECT_UPPER_CS) { + zynqmp_gqspi_selectslave(xqspi, + GQSPI_SELECT_FLASH_CS_UPPER, + GQSPI_SELECT_FLASH_BUS_LOWER); + } else if (qspi->cs_index_mask & GQSPI_SELECT_LOWER_CS) { + zynqmp_gqspi_selectslave(xqspi, + GQSPI_SELECT_FLASH_CS_LOWER, + GQSPI_SELECT_FLASH_BUS_LOWER); + } + genfifoentry |= xqspi->genfifobus; if (!is_high) { - if (!spi_get_chipselect(qspi, 0)) { - xqspi->genfifobus = GQSPI_GENFIFO_BUS_LOWER; - xqspi->genfifocs = GQSPI_GENFIFO_CS_LOWER; - } else { - xqspi->genfifobus = GQSPI_GENFIFO_BUS_UPPER; - xqspi->genfifocs = GQSPI_GENFIFO_CS_UPPER; - } - genfifoentry |= xqspi->genfifobus; genfifoentry |= xqspi->genfifocs; genfifoentry |= GQSPI_GENFIFO_CS_SETUP; } else {