| Message ID | 20230213165743.2.I06f9e461a85fcd5d6fb1e977aa253f6523096b6f@changeid (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [1/2] arm64: dts: qcom: sc7180: Fix trogdor qspi pull direction | expand |
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi index b6137816f2f3..7d787b12c10f 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -703,7 +703,7 @@ &qspi_clk { &qspi_data01 { /* High-Z when no transfers; nice to park the lines */ - bias-pull-up; + bias-pull-down; drive-strength = <8>; };
Though it shouldn't matter very much, we've decided that it's slightly better to park the qspi lines for herobrine with an internal pulldown instead of an internal pullup. There is an external pulldown on one of the data lines on the board and we don't want to have fighting pulls. This also means that if the pulls somehow get left powered in S3 (which I'm uncertain about) that they won't be pulling up lines on an unpowered SPI part. Originally the pullup was picked because SPI transfers are active low and thus the high state is somewhat more "idle", but that really isn't that important because the chip select won't be asserted when the bus is idle. The chip select has a nice external pullup on it that's powered by the same power rail as the SPI flash. This shouldn't have any functionality impact w/ reading/writing the SPI since the lines are always push-pull when SPI transfers are actually taking place. Fixes: 116f7cc43d28 ("arm64: dts: qcom: sc7280: Add herobrine-r1") Signed-off-by: Douglas Anderson <dianders@chromium.org> --- arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)