| Message ID | 20230223-topic-gmuwrapper-v3-2-5be55a336819@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | GMU-less A6xx support (A610, A619_holi) | expand |
On 23/02/2023 13:06, Konrad Dybcio wrote: > GMU wrapper is essentially a register space within the GPU, which > Linux sees as a dumbed-down regular GMU: there's no clocks, > interrupts, multiple regs, iommus and OPP. Document it. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > .../devicetree/bindings/display/msm/gmu.yaml | 49 ++++++++++++++++------ > 1 file changed, 37 insertions(+), 12 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml > index ab14e81cb050..021373e686e1 100644 > --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml > @@ -19,16 +19,18 @@ description: | > > properties: > compatible: > - items: > - - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' > - - const: qcom,adreno-gmu > + oneOf: > + - items: > + - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' > + - const: qcom,adreno-gmu > + - const: qcom,adreno-gmu-wrapper Why wrapper is part of this binding then? Usually wrapper means there is wrapper node with a GMU child (at least this is what we call for all wrappers of custom IP blocks like USB DWC). Where is the child? Best regards, Krzysztof
On 24.02.2023 12:19, Krzysztof Kozlowski wrote: > On 23/02/2023 13:06, Konrad Dybcio wrote: >> GMU wrapper is essentially a register space within the GPU, which >> Linux sees as a dumbed-down regular GMU: there's no clocks, >> interrupts, multiple regs, iommus and OPP. Document it. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> --- >> .../devicetree/bindings/display/msm/gmu.yaml | 49 ++++++++++++++++------ >> 1 file changed, 37 insertions(+), 12 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml >> index ab14e81cb050..021373e686e1 100644 >> --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml >> +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml >> @@ -19,16 +19,18 @@ description: | >> >> properties: >> compatible: >> - items: >> - - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' >> - - const: qcom,adreno-gmu >> + oneOf: >> + - items: >> + - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' >> + - const: qcom,adreno-gmu >> + - const: qcom,adreno-gmu-wrapper > > Why wrapper is part of this binding then? Usually wrapper means there is > wrapper node with a GMU child (at least this is what we call for all > wrappers of custom IP blocks like USB DWC). Where is the child? "GMU wrapper" is a sorta confusing name that Qualcomm chose for the "fake GMU" which has the GMU_CX and GMU_GX registers responsible for things like powering up some GPU things internally and some perf/pwr counters. It is _not_ a wrapper in the sense of a parent-child relationship. The GMU wrapper has no HFI (Hardware Firmware Interface) to communicate through crafted messages, but relies on plain register accesses. Konrad > > > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml index ab14e81cb050..021373e686e1 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -19,16 +19,18 @@ description: | properties: compatible: - items: - - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' - - const: qcom,adreno-gmu + oneOf: + - items: + - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' + - const: qcom,adreno-gmu + - const: qcom,adreno-gmu-wrapper reg: - minItems: 3 + minItems: 1 maxItems: 4 reg-names: - minItems: 3 + minItems: 1 maxItems: 4 clocks: @@ -44,7 +46,6 @@ properties: - description: GMU HFI interrupt - description: GMU interrupt - interrupt-names: items: - const: hfi @@ -72,14 +73,8 @@ required: - compatible - reg - reg-names - - clocks - - clock-names - - interrupts - - interrupt-names - power-domains - power-domain-names - - iommus - - operating-points-v2 additionalProperties: false @@ -216,6 +211,27 @@ allOf: - const: cxo - const: axi - const: memnoc + - if: + properties: + compatible: + contains: + const: qcom,adreno-gmu-wrapper + then: + properties: + reg: + items: + - description: GMU wrapper register space + reg-names: + items: + - const: gmu + else: + required: + - clocks + - clock-names + - interrupts + - interrupt-names + - iommus + - operating-points-v2 examples: - | @@ -249,3 +265,12 @@ examples: iommus = <&adreno_smmu 5>; operating-points-v2 = <&gmu_opp_table>; }; + + gmu_wrapper: gmu@596a000 { + compatible = "qcom,adreno-gmu-wrapper"; + reg = <0x0596a000 0x30000>; + reg-names = "gmu"; + power-domains = <&gpucc GPU_CX_GDSC>, + <&gpucc GPU_GX_GDSC>; + power-domain-names = "cx", "gx"; + };
GMU wrapper is essentially a register space within the GPU, which Linux sees as a dumbed-down regular GMU: there's no clocks, interrupts, multiple regs, iommus and OPP. Document it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- .../devicetree/bindings/display/msm/gmu.yaml | 49 ++++++++++++++++------ 1 file changed, 37 insertions(+), 12 deletions(-)