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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id u7-20020ac243c7000000b004dc4d26c324sm2467479lfl.143.2023.03.08.13.35.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 13:35:38 -0800 (PST) From: Konrad Dybcio Date: Wed, 08 Mar 2023 22:35:18 +0100 Subject: [PATCH RFT v2 02/14] clk: qcom: smd-rpm: Add .is_enabled hook MIME-Version: 1.0 Message-Id: <20230303-topic-rpmcc_sleep-v2-2-ae80a325fe94@linaro.org> References: <20230303-topic-rpmcc_sleep-v2-0-ae80a325fe94@linaro.org> In-Reply-To: <20230303-topic-rpmcc_sleep-v2-0-ae80a325fe94@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , devicetree@vger.kernel.org, Konrad Dybcio , Shawn Guo X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678311334; l=1448; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=DkAvY529UR+RwkQzY1FO48/jck/x44pR7ssps7xiA3g=; b=bMTX86MhRue6/CH4CAoR6mX0UhkJTn6HwQaKXt995jwdXJIOSTvZ4jiIt70kDOEqeCI115aI/A1n ZdtbcESyAwGjcxMnj2Cdm9vW5rThMJ5JfMdD6oFC26GRd42RhZeu X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Shawn Guo The RPM clock enabling state can be found with 'enabled' in struct clk_smd_rpm. Add .is_enabled hook so that clk_summary in debugfs can show a correct enabling state for RPM clocks. Signed-off-by: Shawn Guo [Konrad: rebase] Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/clk-smd-rpm.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 198886c1b6c8..ecacfbc4a16c 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -424,18 +424,27 @@ static int clk_smd_rpm_enable_scaling(struct qcom_smd_rpm *rpm) return 0; } +static int clk_smd_rpm_is_enabled(struct clk_hw *hw) +{ + struct clk_smd_rpm *r = to_clk_smd_rpm(hw); + + return r->enabled; +} + static const struct clk_ops clk_smd_rpm_ops = { .prepare = clk_smd_rpm_prepare, .unprepare = clk_smd_rpm_unprepare, .set_rate = clk_smd_rpm_set_rate, .round_rate = clk_smd_rpm_round_rate, .recalc_rate = clk_smd_rpm_recalc_rate, + .is_enabled = clk_smd_rpm_is_enabled, }; static const struct clk_ops clk_smd_rpm_branch_ops = { .prepare = clk_smd_rpm_prepare, .unprepare = clk_smd_rpm_unprepare, .recalc_rate = clk_smd_rpm_recalc_rate, + .is_enabled = clk_smd_rpm_is_enabled, }; DEFINE_CLK_SMD_RPM_BRANCH_A(bi_tcxo, QCOM_SMD_RPM_MISC_CLK, 0, 19200000);