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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id u7-20020ac243c7000000b004dc4d26c324sm2467479lfl.143.2023.03.08.13.35.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 13:35:43 -0800 (PST) From: Konrad Dybcio Date: Wed, 08 Mar 2023 22:35:21 +0100 Subject: [PATCH RFT v2 05/14] clk: qcom: smd-rpm: Make DEFINE_CLK_SMD_RPM_BRANCH_A accept flags MIME-Version: 1.0 Message-Id: <20230303-topic-rpmcc_sleep-v2-5-ae80a325fe94@linaro.org> References: <20230303-topic-rpmcc_sleep-v2-0-ae80a325fe94@linaro.org> In-Reply-To: <20230303-topic-rpmcc_sleep-v2-0-ae80a325fe94@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , devicetree@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678311334; l=1812; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=svZJYxWNeuanDoOsLpbm2ZL4k08Cxtikg953kjcomQI=; b=sWofPdTB+S2gmrrLLUFIgZQAJ2Dpw8GiAIqWBFrlUA0dFPLwJP/f1iFMOzWa5eP3iGN9mRFIVl6i PnKA34jlACMIaRLdI7hJ6pz6gH95zN0ugXHXujjpvItq48fx3w8B X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In preparation for supporting keepalive clocks which can never be shut off (as the platform would fall apart otherwise), make the DEFINE_CLK_SMD_RPM_BRANCH_A macro accept clock flags for the active-only clock. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/clk-smd-rpm.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index 72b1f010509b..fec6ae4a8989 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -129,10 +129,10 @@ _name##_clk, _name##_a_clk, \ type, r_id, r, QCOM_RPM_SMD_KEY_ENABLE, 0) -#define DEFINE_CLK_SMD_RPM_BRANCH_A(_name, type, r_id, r) \ +#define DEFINE_CLK_SMD_RPM_BRANCH_A(_name, type, r_id, r, ao_flags) \ __DEFINE_CLK_SMD_RPM_BRANCH_PREFIX(branch_, \ _name, _name##_a, type, \ - r_id, r, QCOM_RPM_SMD_KEY_ENABLE, 0) + r_id, r, QCOM_RPM_SMD_KEY_ENABLE, ao_flags) #define DEFINE_CLK_SMD_RPM_QDSS(_name, type, r_id) \ __DEFINE_CLK_SMD_RPM(_name##_clk, _name##_a_clk, \ @@ -450,10 +450,10 @@ static const struct clk_ops clk_smd_rpm_branch_ops = { .is_prepared = clk_smd_rpm_is_enabled, }; -DEFINE_CLK_SMD_RPM_BRANCH_A(bi_tcxo, QCOM_SMD_RPM_MISC_CLK, 0, 19200000); +DEFINE_CLK_SMD_RPM_BRANCH_A(bi_tcxo, QCOM_SMD_RPM_MISC_CLK, 0, 19200000, 0); DEFINE_CLK_SMD_RPM_BRANCH(qdss, QCOM_SMD_RPM_MISC_CLK, 1, 19200000); DEFINE_CLK_SMD_RPM_QDSS(qdss, QCOM_SMD_RPM_MISC_CLK, 1); -DEFINE_CLK_SMD_RPM_BRANCH_A(bimc_freq_log, QCOM_SMD_RPM_MISC_CLK, 4, 1); +DEFINE_CLK_SMD_RPM_BRANCH_A(bimc_freq_log, QCOM_SMD_RPM_MISC_CLK, 4, 1, 0); DEFINE_CLK_SMD_RPM_BRANCH(mss_cfg_ahb, QCOM_SMD_RPM_MCFG_CLK, 0, 19200000);