diff mbox series

[3/5] arm64: dts: qcom: sdm845: update QCE compatible according to a new scheme

Message ID 20230323233735.2131020-4-vladimir.zapolskiy@linaro.org (mailing list archive)
State Superseded
Headers show
Series arm64: dts: qcom: add QCE on SM8250 and SM8450 platforms | expand

Commit Message

Vladimir Zapolskiy March 23, 2023, 11:37 p.m. UTC
Change the old deprecated compatible name of QCE IP on SDM845 to new
ones based on SoC name.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Krzysztof Kozlowski March 24, 2023, 9:54 a.m. UTC | #1
On 24/03/2023 00:37, Vladimir Zapolskiy wrote:
> Change the old deprecated compatible name of QCE IP on SDM845 to new
> ones based on SoC name.
> 
> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 2f32179c7d1b..bca0521dc08c 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -2643,7 +2643,7 @@ cryptobam: dma-controller@1dc4000 {
>  		};
>  
>  		crypto: crypto@1dfa000 {
> -			compatible = "qcom,crypto-v5.4";
> +			compatible = "qcom,sdm845-qce", "qcom,ipq4019-qce", "qcom,qce";

Same comments as previous patch. I guess it applies to other patches as
well.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 2f32179c7d1b..bca0521dc08c 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2643,7 +2643,7 @@  cryptobam: dma-controller@1dc4000 {
 		};
 
 		crypto: crypto@1dfa000 {
-			compatible = "qcom,crypto-v5.4";
+			compatible = "qcom,sdm845-qce", "qcom,ipq4019-qce", "qcom,qce";
 			reg = <0 0x01dfa000 0 0x6000>;
 			clocks = <&gcc GCC_CE1_AHB_CLK>,
 				 <&gcc GCC_CE1_AXI_CLK>,