From patchwork Wed May 17 18:51:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jessica Zhang X-Patchwork-Id: 13245541 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61615C7EE2F for ; Wed, 17 May 2023 18:52:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229456AbjEQSwx (ORCPT ); Wed, 17 May 2023 14:52:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229883AbjEQSwe (ORCPT ); Wed, 17 May 2023 14:52:34 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C60777DBB for ; Wed, 17 May 2023 11:52:29 -0700 (PDT) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34HHlDul022846; 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Wed, 17 May 2023 18:52:22 GMT Received: from jesszhan-linux.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 17 May 2023 11:52:22 -0700 From: Jessica Zhang Date: Wed, 17 May 2023 11:51:12 -0700 Subject: [PATCH v11 3/9] drm/display/dsc: Add drm_dsc_get_bpp_int helper MIME-Version: 1.0 Message-ID: <20230329-rfc-msm-dsc-helper-v11-3-30270e1eeac3@quicinc.com> References: <20230329-rfc-msm-dsc-helper-v11-0-30270e1eeac3@quicinc.com> In-Reply-To: <20230329-rfc-msm-dsc-helper-v11-0-30270e1eeac3@quicinc.com> To: CC: Marijn Suijten , Konrad Dybcio , Kuogee Hsieh , "Daniel Vetter" , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , , , Jessica Zhang X-Mailer: b4 0.13-dev-bfdf5 X-Developer-Signature: v=1; a=ed25519-sha256; t=1684349541; l=1198; i=quic_jesszhan@quicinc.com; s=20230329; h=from:subject:message-id; bh=+0Kq1b99/0BgeKJJVe5tBRw+pclzLyY6kKF10ObSQ6A=; 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int drm_dsc_setup_rc_params(struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_kind kind); int drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg); +static inline u32 drm_dsc_get_bpp_int(const struct drm_dsc_config *dsc) +{ + WARN_ON_ONCE(dsc->bits_per_pixel & 0xf); + return dsc->bits_per_pixel >> 4; +} + static inline u8 drm_dsc_initial_scale_value(const struct drm_dsc_config *dsc) { return 8 * dsc->rc_model_size / (dsc->rc_model_size - dsc->initial_offset);