Message ID | 20230329-topic-adreno_opp-v1-2-24d34ac6f007@linaro.org (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | Improve some Adreno Device Tree nodes | expand |
On Wed, 29 Mar 2023 at 22:17, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > Since power-domains is used for perf_level pm_genpd scaling, it's only > fitting that we pass a power domain that's actually supposed to be > scaled (and not only turned on/off) to the GPU. While we don't quite > support CPR3 yet, the next best thing we can do is pass VDDMX, so that > we're at least guaranteed a reasonable vote on the memory side of > things. Do so and leave a note mentioning CPR3 PD should be used here > instead when support is added. > > Fixes: 69cc3114ab0f ("arm64: dts: Add Adreno GPU definitions") > Fixes: 3f65d51e9e22 ("arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC") > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > arch/arm64/boot/dts/qcom/msm8996.dtsi | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > index 4661a556772e..4dd37f72e018 100644 > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > @@ -1228,7 +1228,8 @@ gpu: gpu@b00000 { > interconnects = <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>; > interconnect-names = "gfx-mem"; > > - power-domains = <&mmcc GPU_GX_GDSC>; > + /* TODO: also scale VDDGFX with CPR3 */ > + power-domains = <&rpmpd MSM8996_VDDMX>; > iommus = <&adreno_smmu 0>; > > nvmem-cells = <&speedbin_efuse>; > @@ -2254,7 +2255,13 @@ adreno_smmu: iommu@b40000 { > <&mmcc GPU_AHB_CLK>; > clock-names = "bus", "iface"; > > - power-domains = <&mmcc GPU_GDSC>; > + /* > + * We need both GPU_GDSC and GPU_GX_GDSC to be on, but the > + * power-domains entry under gpu is occupied by the scaled > + * voltage domain. Since GPU_GDSC is a parent of GX_GDSC, > + * we can simply pass GX here to turn them both on! > + */ Ugh. You can pass GX and VDDMX to the gpu. Let me send the patch supporting that. > + power-domains = <&mmcc GPU_GX_GDSC>; > }; > > venus: video-codec@c00000 { > > -- > 2.40.0 >
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 4661a556772e..4dd37f72e018 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1228,7 +1228,8 @@ gpu: gpu@b00000 { interconnects = <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>; interconnect-names = "gfx-mem"; - power-domains = <&mmcc GPU_GX_GDSC>; + /* TODO: also scale VDDGFX with CPR3 */ + power-domains = <&rpmpd MSM8996_VDDMX>; iommus = <&adreno_smmu 0>; nvmem-cells = <&speedbin_efuse>; @@ -2254,7 +2255,13 @@ adreno_smmu: iommu@b40000 { <&mmcc GPU_AHB_CLK>; clock-names = "bus", "iface"; - power-domains = <&mmcc GPU_GDSC>; + /* + * We need both GPU_GDSC and GPU_GX_GDSC to be on, but the + * power-domains entry under gpu is occupied by the scaled + * voltage domain. Since GPU_GDSC is a parent of GX_GDSC, + * we can simply pass GX here to turn them both on! + */ + power-domains = <&mmcc GPU_GX_GDSC>; }; venus: video-codec@c00000 {
Since power-domains is used for perf_level pm_genpd scaling, it's only fitting that we pass a power domain that's actually supposed to be scaled (and not only turned on/off) to the GPU. While we don't quite support CPR3 yet, the next best thing we can do is pass VDDMX, so that we're at least guaranteed a reasonable vote on the memory side of things. Do so and leave a note mentioning CPR3 PD should be used here instead when support is added. Fixes: 69cc3114ab0f ("arm64: dts: Add Adreno GPU definitions") Fixes: 3f65d51e9e22 ("arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)