| Message ID | 20230407151423.59993-2-nikita@trvn.ru (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add Acer Aspire 1 | expand |
Hi, On Fri, Apr 7, 2023 at 8:14 AM Nikita Travkin <nikita@trvn.ru> wrote: > > lpass clocks are usually blocked from HLOS by the firmware and > instead are managed by the ADSP. Mark them as reserved and explicitly > enable in the CrOS boards that have special, cooperative firmware. > > Signed-off-by: Nikita Travkin <nikita@trvn.ru> > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > v5: minor style changes (Konrad) > --- > arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 8 ++++++++ > arch/arm64/boot/dts/qcom/sc7180.dtsi | 4 ++++ > 2 files changed, 12 insertions(+) I probably would have put a note in the commit message about why you chose not to enable these for IDP (AKA summarize the results of the conversation [1] in your v3 post). IMO not worth spinning a v6 just for this, though. Reviewed-by: Douglas Anderson <dianders@chromium.org> [1] https://lore.kernel.org/r/3557aa94-6a83-d054-a9d9-81751165eb8a@linaro.org
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 423630c4d02c..7e57899ef2c6 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -785,6 +785,10 @@ alc5682: codec@1a { }; }; +&lpasscc { + status = "okay"; +}; + &lpass_cpu { status = "okay"; @@ -810,6 +814,10 @@ dai-link@5 { }; }; +&lpass_hm { + status = "okay"; +}; + &mdp { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 3c799b564b64..6f40301faa1c 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3621,6 +3621,8 @@ lpasscc: clock-controller@62d00000 { power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>; #clock-cells = <1>; #power-domain-cells = <1>; + + status = "reserved"; /* Controlled by ADSP */ }; lpass_cpu: lpass@62d87000 { @@ -3669,6 +3671,8 @@ lpass_hm: clock-controller@63000000 { #clock-cells = <1>; #power-domain-cells = <1>; + + status = "reserved"; /* Controlled by ADSP */ }; };