From patchwork Tue May 9 16:12:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagadeesh Kona X-Patchwork-Id: 13235927 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 552B2C7EE25 for ; Tue, 9 May 2023 16:13:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235887AbjEIQNR (ORCPT ); Tue, 9 May 2023 12:13:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39212 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235879AbjEIQNQ (ORCPT ); Tue, 9 May 2023 12:13:16 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44ABE4203; Tue, 9 May 2023 09:13:15 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 349Eegik001624; Tue, 9 May 2023 16:13:12 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=3nIpmMfn0GgSbYKl2eKouNnVNprFqr1ccl0WObErS48=; b=OuCLtcf/es6+IvdlPuOTDeKqWTAt1DGAh3ON4tQ31IPp24wiq0GPDap5GooloiaOrB68 EPO1lBqzmzalhrckIl+frv9CBYSXTGVEcejUXRxjkQPgWx/XfgJg177EPNSZQUBu9g+y EeaKhTxUPYGN3Km8ypkNiS8jC/7Duz3cRpBm4XjQe/CLDjIJ/9kF39iN5rs26a8ERh6T NwB01cpQ85Y6QvVwic+n+1iT8J95re5Gr/6041pV8pZj3SskSHpMrrXKZTVbUOuCi0EF iTt13mY4n2qHyMDcHnjICzCFKwooIuOw5JE1786VFOoiDyRqkXm0vusD/H7apuWEZB+E pQ== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qfr5089fs-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 09 May 2023 16:13:11 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 349GDAWn025780 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 9 May 2023 16:13:10 GMT Received: from hu-jkona-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Tue, 9 May 2023 09:13:06 -0700 From: Jagadeesh Kona To: Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Conor Dooley CC: Bjorn Andersson , Konrad Dybcio , Jagadeesh Kona , "Taniya Das" , , , , Subject: [PATCH 1/4] clk: qcom: clk-alpha-pll: Add support for lucid ole pll ops Date: Tue, 9 May 2023 21:42:15 +0530 Message-ID: <20230509161218.11979-2-quic_jkona@quicinc.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230509161218.11979-1-quic_jkona@quicinc.com> References: <20230509161218.11979-1-quic_jkona@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: FRNaBhGw9h2DooLZqgHeR5pRZCzhNjaZ X-Proofpoint-ORIG-GUID: FRNaBhGw9h2DooLZqgHeR5pRZCzhNjaZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-09_09,2023-05-05_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 priorityscore=1501 mlxscore=0 mlxlogscore=853 bulkscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 impostorscore=0 adultscore=0 phishscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305090133 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Taniya Das Add support for lucid ole pll ops to configure and control the lucid ole pll. The lucid ole pll has an additional test control register which is required to be programmed, add support to program the same. Signed-off-by: Taniya Das Signed-off-by: Jagadeesh Kona --- drivers/clk/qcom/clk-alpha-pll.c | 2 ++ drivers/clk/qcom/clk-alpha-pll.h | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index b9f6535a7ba7..f81c7c561352 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -55,6 +55,7 @@ #define PLL_TEST_CTL(p) ((p)->offset + (p)->regs[PLL_OFF_TEST_CTL]) #define PLL_TEST_CTL_U(p) ((p)->offset + (p)->regs[PLL_OFF_TEST_CTL_U]) #define PLL_TEST_CTL_U1(p) ((p)->offset + (p)->regs[PLL_OFF_TEST_CTL_U1]) +#define PLL_TEST_CTL_U2(p) ((p)->offset + (p)->regs[PLL_OFF_TEST_CTL_U2]) #define PLL_STATUS(p) ((p)->offset + (p)->regs[PLL_OFF_STATUS]) #define PLL_OPMODE(p) ((p)->offset + (p)->regs[PLL_OFF_OPMODE]) #define PLL_FRAC(p) ((p)->offset + (p)->regs[PLL_OFF_FRAC]) @@ -2096,6 +2097,7 @@ void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regma clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val); clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val); clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val); /* Disable PLL output */ regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0); diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h index d07b17186b90..4d9b6d5b7062 100644 --- a/drivers/clk/qcom/clk-alpha-pll.h +++ b/drivers/clk/qcom/clk-alpha-pll.h @@ -125,6 +125,7 @@ struct alpha_pll_config { u32 test_ctl_val; u32 test_ctl_hi_val; u32 test_ctl_hi1_val; + u32 test_ctl_hi2_val; u32 main_output_mask; u32 aux_output_mask; u32 aux2_output_mask; @@ -171,6 +172,7 @@ extern const struct clk_ops clk_alpha_pll_zonda_ops; #define clk_alpha_pll_postdiv_zonda_ops clk_alpha_pll_postdiv_fabia_ops extern const struct clk_ops clk_alpha_pll_lucid_evo_ops; +#define clk_alpha_pll_lucid_ole_ops clk_alpha_pll_lucid_evo_ops extern const struct clk_ops clk_alpha_pll_reset_lucid_evo_ops; #define clk_alpha_pll_reset_lucid_ole_ops clk_alpha_pll_reset_lucid_evo_ops extern const struct clk_ops clk_alpha_pll_fixed_lucid_evo_ops; @@ -196,6 +198,8 @@ void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config); void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config); +#define clk_lucid_ole_pll_configure(pll, regmap, config) \ + clk_lucid_evo_pll_configure(pll, regmap, config) void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config); void clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,