diff mbox series

[1/4] clk: qcom: clk-alpha-pll: Add support for rivian ole pll ops

Message ID 20230519155602.6642-2-quic_jkona@quicinc.com (mailing list archive)
State Superseded
Headers show
Series Add camera clock controller support for SM8550 | expand

Commit Message

Jagadeesh Kona May 19, 2023, 3:55 p.m. UTC
Add support for rivian ole pll ops and ole pll registers to
configure and control the rivian ole pll.

Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
---
 drivers/clk/qcom/clk-alpha-pll.h | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Konrad Dybcio May 19, 2023, 4:49 p.m. UTC | #1
On 19.05.2023 17:55, Jagadeesh Kona wrote:
> Add support for rivian ole pll ops and ole pll registers to
> configure and control the rivian ole pll.
> 
> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> ---
>  drivers/clk/qcom/clk-alpha-pll.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
> index 4d9b6d5b7062..e6df398bee6d 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.h
> +++ b/drivers/clk/qcom/clk-alpha-pll.h
> @@ -24,6 +24,7 @@ enum {
>  	CLK_ALPHA_PLL_TYPE_LUCID_EVO,
>  	CLK_ALPHA_PLL_TYPE_LUCID_OLE,
>  	CLK_ALPHA_PLL_TYPE_RIVIAN_EVO,
> +	CLK_ALPHA_PLL_TYPE_RIVIAN_OLE = CLK_ALPHA_PLL_TYPE_RIVIAN_EVO,
This makes sense

The rest is just sugar syntax, I don't think it makes sense to keep
adding meaningless defines..

Konrad
>  	CLK_ALPHA_PLL_TYPE_DEFAULT_EVO,
>  	CLK_ALPHA_PLL_TYPE_BRAMMO_EVO,
>  	CLK_ALPHA_PLL_TYPE_STROMER,
> @@ -181,6 +182,7 @@ extern const struct clk_ops clk_alpha_pll_postdiv_lucid_evo_ops;
>  #define clk_alpha_pll_postdiv_lucid_ole_ops clk_alpha_pll_postdiv_lucid_evo_ops
>  
>  extern const struct clk_ops clk_alpha_pll_rivian_evo_ops;
> +#define clk_alpha_pll_rivian_ole_ops clk_alpha_pll_rivian_evo_ops
>  #define clk_alpha_pll_postdiv_rivian_evo_ops clk_alpha_pll_postdiv_fabia_ops
>  
>  void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
> @@ -202,6 +204,8 @@ void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regma
>  			clk_lucid_evo_pll_configure(pll, regmap, config)
>  void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
>  				  const struct alpha_pll_config *config);
> +#define clk_rivian_ole_pll_configure(pll, regmap, config) \
> +			clk_rivian_evo_pll_configure(pll, regmap, config)
>  void clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
>  			       const struct alpha_pll_config *config);
>
Jagadeesh Kona May 25, 2023, 4:42 p.m. UTC | #2
Hi Konrad,

Thanks for your review!

On 5/19/2023 10:19 PM, Konrad Dybcio wrote:
> 
> 
> On 19.05.2023 17:55, Jagadeesh Kona wrote:
>> Add support for rivian ole pll ops and ole pll registers to
>> configure and control the rivian ole pll.
>>
>> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>> ---
>>   drivers/clk/qcom/clk-alpha-pll.h | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
>> index 4d9b6d5b7062..e6df398bee6d 100644
>> --- a/drivers/clk/qcom/clk-alpha-pll.h
>> +++ b/drivers/clk/qcom/clk-alpha-pll.h
>> @@ -24,6 +24,7 @@ enum {
>>   	CLK_ALPHA_PLL_TYPE_LUCID_EVO,
>>   	CLK_ALPHA_PLL_TYPE_LUCID_OLE,
>>   	CLK_ALPHA_PLL_TYPE_RIVIAN_EVO,
>> +	CLK_ALPHA_PLL_TYPE_RIVIAN_OLE = CLK_ALPHA_PLL_TYPE_RIVIAN_EVO,
> This makes sense
> 
> The rest is just sugar syntax, I don't think it makes sense to keep
> adding meaningless defines..
> 
Yes, will remove these and reuse existing ops in next series.

> Konrad
>>   	CLK_ALPHA_PLL_TYPE_DEFAULT_EVO,
>>   	CLK_ALPHA_PLL_TYPE_BRAMMO_EVO,
>>   	CLK_ALPHA_PLL_TYPE_STROMER,
>> @@ -181,6 +182,7 @@ extern const struct clk_ops clk_alpha_pll_postdiv_lucid_evo_ops;
>>   #define clk_alpha_pll_postdiv_lucid_ole_ops clk_alpha_pll_postdiv_lucid_evo_ops
>>   
>>   extern const struct clk_ops clk_alpha_pll_rivian_evo_ops;
>> +#define clk_alpha_pll_rivian_ole_ops clk_alpha_pll_rivian_evo_ops
>>   #define clk_alpha_pll_postdiv_rivian_evo_ops clk_alpha_pll_postdiv_fabia_ops
>>   
>>   void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
>> @@ -202,6 +204,8 @@ void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regma
>>   			clk_lucid_evo_pll_configure(pll, regmap, config)
>>   void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
>>   				  const struct alpha_pll_config *config);
>> +#define clk_rivian_ole_pll_configure(pll, regmap, config) \
>> +			clk_rivian_evo_pll_configure(pll, regmap, config)
>>   void clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
>>   			       const struct alpha_pll_config *config);
>>

Thanks & Regards,
Jagadeesh
diff mbox series

Patch

diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
index 4d9b6d5b7062..e6df398bee6d 100644
--- a/drivers/clk/qcom/clk-alpha-pll.h
+++ b/drivers/clk/qcom/clk-alpha-pll.h
@@ -24,6 +24,7 @@  enum {
 	CLK_ALPHA_PLL_TYPE_LUCID_EVO,
 	CLK_ALPHA_PLL_TYPE_LUCID_OLE,
 	CLK_ALPHA_PLL_TYPE_RIVIAN_EVO,
+	CLK_ALPHA_PLL_TYPE_RIVIAN_OLE = CLK_ALPHA_PLL_TYPE_RIVIAN_EVO,
 	CLK_ALPHA_PLL_TYPE_DEFAULT_EVO,
 	CLK_ALPHA_PLL_TYPE_BRAMMO_EVO,
 	CLK_ALPHA_PLL_TYPE_STROMER,
@@ -181,6 +182,7 @@  extern const struct clk_ops clk_alpha_pll_postdiv_lucid_evo_ops;
 #define clk_alpha_pll_postdiv_lucid_ole_ops clk_alpha_pll_postdiv_lucid_evo_ops
 
 extern const struct clk_ops clk_alpha_pll_rivian_evo_ops;
+#define clk_alpha_pll_rivian_ole_ops clk_alpha_pll_rivian_evo_ops
 #define clk_alpha_pll_postdiv_rivian_evo_ops clk_alpha_pll_postdiv_fabia_ops
 
 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
@@ -202,6 +204,8 @@  void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regma
 			clk_lucid_evo_pll_configure(pll, regmap, config)
 void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
 				  const struct alpha_pll_config *config);
+#define clk_rivian_ole_pll_configure(pll, regmap, config) \
+			clk_rivian_evo_pll_configure(pll, regmap, config)
 void clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
 			       const struct alpha_pll_config *config);