From patchwork Mon May 22 09:36:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13250023 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C33AC7EE2D for ; Mon, 22 May 2023 09:36:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232237AbjEVJgg (ORCPT ); Mon, 22 May 2023 05:36:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232157AbjEVJgd (ORCPT ); Mon, 22 May 2023 05:36:33 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 144C7B7; Mon, 22 May 2023 02:36:33 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34M9W6EI002775; Mon, 22 May 2023 09:36:30 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=qcppdkim1; bh=PXapD9JxMsFjcT9UCiMPxZ6OLLakeDOwOjp3iq3BkHU=; b=LRznRbYV1yZ6RdLygPbdCNWAl1C1VMvMSWwW4wuXN/ZHQFwe7tJ3nL4XxbViqs+bTXr3 qJfTzv8p17gaeME5bUF/wgHceX5J3NxT8tc8Xl0R9WLW5imlKEI3qop9m5/tBCJqT80k 0ntP56c85fy5s9fTRQQBl13CWrPPaZG+49vvjUiaWfEceIp2ZlPJmiRTdWh0/ckzQ8El kX/+IVuF2L217R0fqmnkNEouAxQ+B2tsUG1P3YcRT3wxsyc9Cz7r9+hkgymgRv0OhKd9 X4ORBpD7M9ERanQLsqV5gO7ajWKwo+SeuLvC9jyc/CFO49OCfHUIlsSbWum++LPu7wFi aQ== Received: from apblrppmta01.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qppypb700-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 22 May 2023 09:36:30 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 34M9aQSf026251; Mon, 22 May 2023 09:36:26 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 3qpq9kn8ff-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 22 May 2023 09:36:26 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 34M9aQuT026246; Mon, 22 May 2023 09:36:26 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-kbajaj-hyd.qualcomm.com [10.147.247.189]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 34M9aPQJ026245; Mon, 22 May 2023 09:36:26 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 2340697) id 49FE75001C2; Mon, 22 May 2023 15:06:25 +0530 (+0530) From: Komal Bajaj To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio , Bhupesh Sharma Cc: Komal Bajaj , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 2/4] arm: dts: qcom: qdu1000: Add SDHCI node Date: Mon, 22 May 2023 15:06:18 +0530 Message-Id: <20230522093620.3568-3-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230522093620.3568-1-quic_kbajaj@quicinc.com> References: <20230522093620.3568-1-quic_kbajaj@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: SGfk2F-htbFLEkHpItWkM1vtjqxYySYg X-Proofpoint-GUID: SGfk2F-htbFLEkHpItWkM1vtjqxYySYg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-22_06,2023-05-17_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 clxscore=1015 mlxlogscore=999 phishscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 malwarescore=0 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305220081 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add sdhc node for eMMC on QDU1000 and QRU1000 SoCs. Signed-off-by: Komal Bajaj --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 51 +++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index 734438113bba..38ee7115a35f 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -19,6 +19,10 @@ chosen: chosen { }; + aliases { + mmc0 = &sdhc_1; /* eMMC */ + }; + cpus { #address-cells = <2>; #size-cells = <0>; @@ -842,6 +846,53 @@ #hwlock-cells = <1>; }; + sdhc_1: mmc@8804000 { + compatible = "qcom,qdu1000-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x0 0x08804000 0x0 0x1000>, + <0x0 0x08805000 0x0 0x1000>; + reg-names = "hc", "cqhci"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC5_AHB_CLK>, + <&gcc GCC_SDCC5_APPS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", + "core", + "xo"; + + resets = <&gcc GCC_SDCC5_BCR>; + + interconnects = <&system_noc MASTER_SDCC_1 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &system_noc SLAVE_SDCC_2 0>; + interconnect-names = "sdhc-ddr", "cpu-sdhc"; + power-domains = <&rpmhpd QDU1000_CX>; + operating-points-v2 = <&sdhc1_opp_table>; + + iommus = <&apps_smmu 0x80 0x0>; + dma-coherent; + + bus-width = <8>; + + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; + + status = "disabled"; + + sdhc1_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmhpd_opp_nom>; + opp-peak-kBps = <6528000 1652800>; + opp-avg-kBps = <400000 0>; + }; + }; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,qdu1000-pdc", "qcom,pdc"; reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;