diff mbox series

[2/3] arm64: dts: qcom: sa8775p: Add interconnect to PCIe SMMU

Message ID 20230609054141.18938-3-quic_ppareek@quicinc.com (mailing list archive)
State Changes Requested
Headers show
Series arm64: dts: qcom: sa8775p: Add interconnect to SMMU | expand

Commit Message

Parikshit Pareek June 9, 2023, 5:41 a.m. UTC
Introduce the interconnect, connecting PCIe SMMU to the memory. This
is accessed during memory mapped IO access of smmu registers, and
during page table walks.

Reported-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Krzysztof Kozlowski June 9, 2023, 1:23 p.m. UTC | #1
On 09/06/2023 07:41, Parikshit Pareek wrote:
> Introduce the interconnect, connecting PCIe SMMU to the memory. This
> is accessed during memory mapped IO access of smmu registers, and
> during page table walks.
> 
> Reported-by: Eric Chanudet <echanude@redhat.com>
> Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index b130136acffe..ea3c37019c46 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -2137,6 +2137,10 @@
>  				     <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH>;
> +			interconnects = <&pcie_anoc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS
> +					&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> +			interconnect-names = "tbu_mc";
> +			icc_bw = <250>;

Why 250? Why it cannot change during system run depending on the needs?


Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index b130136acffe..ea3c37019c46 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -2137,6 +2137,10 @@ 
 				     <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH>;
+			interconnects = <&pcie_anoc MASTER_PCIE_0 QCOM_ICC_TAG_ALWAYS
+					&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+			interconnect-names = "tbu_mc";
+			icc_bw = <250>;
 		};
 
 		intc: interrupt-controller@17a00000 {