| Message ID | 20230612092355.87937-26-brgl@bgdev.pl (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: qcom: sa8775p-ride: enable the first ethernet port | expand |
On 12.06.2023 11:23, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add the MDC and MDIO pin functions for ethernet0 on sa8775p-ride. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts > index 7754788ea775..dbd9553aa5c7 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts > +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts > @@ -370,6 +370,22 @@ &spi16 { > }; > > &tlmm { > + ethernet0_default: ethernet0-default-state { > + ethernet0_mdc: ethernet0-mdc-pins { > + pins = "gpio8"; > + function = "emac0_mdc"; > + drive-strength = <16>; > + bias-pull-up; > + }; > + > + ethernet0_mdio: ethernet0-mdio-pins { > + pins = "gpio9"; > + function = "emac0_mdio"; > + drive-strength = <16>; > + bias-pull-up; > + }; > + }; > + > qup_uart10_default: qup-uart10-state { > pins = "gpio46", "gpio47"; > function = "qup1_se3";
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index 7754788ea775..dbd9553aa5c7 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -370,6 +370,22 @@ &spi16 { }; &tlmm { + ethernet0_default: ethernet0-default-state { + ethernet0_mdc: ethernet0-mdc-pins { + pins = "gpio8"; + function = "emac0_mdc"; + drive-strength = <16>; + bias-pull-up; + }; + + ethernet0_mdio: ethernet0-mdio-pins { + pins = "gpio9"; + function = "emac0_mdio"; + drive-strength = <16>; + bias-pull-up; + }; + }; + qup_uart10_default: qup-uart10-state { pins = "gpio46", "gpio47"; function = "qup1_se3";