Message ID | 20230612182534.3345805-2-dmitry.baryshkov@linaro.org (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Series | [1/2] drm/msm/dpu: do not enable color-management if DSPPs are not available | expand |
On 6/12/2023 11:25 AM, Dmitry Baryshkov wrote: > Add definitions of DSPP blocks present on the sdm845 platform. This > should enable color-management on sdm845-bassed devices. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > .../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 21 +++++++++++++++---- > 1 file changed, 17 insertions(+), 4 deletions(-) > This change itself is fine, hence Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> one note below for a future cleanup: > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h > index 36ea1af10894..b6098141bb9b 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h > @@ -96,19 +96,30 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = { > > static const struct dpu_lm_cfg sdm845_lm[] = { > LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_0, LM_1, 0), > + &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0), > LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_1, LM_0, 0), > + &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1), > LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_2, LM_5, 0), > + &sdm845_lm_sblk, PINGPONG_2, LM_5, DSPP_2), > LM_BLK("lm_3", LM_3, 0x0, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_NONE, 0, 0), > + &sdm845_lm_sblk, PINGPONG_NONE, 0, DSPP_3), > LM_BLK("lm_4", LM_4, 0x0, MIXER_SDM845_MASK, > &sdm845_lm_sblk, PINGPONG_NONE, 0, 0), > LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK, > &sdm845_lm_sblk, PINGPONG_3, LM_2, 0), > }; > > +static const struct dpu_dspp_cfg sdm845_dspp[] = { > + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > +}; > + I see the len of pcc blocks should be 0x88 not 0x90 as sm8150_dspp_sblk explains. Also, I need to do some digging on the PCC version here. Can you pls provide me the link to downstream source which mentions PCC version is 4.0 for sdm845? > static const struct dpu_pingpong_cfg sdm845_pp[] = { > PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SDM845_TE2_MASK, 0, sdm845_pp_sblk_te, > DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), > @@ -193,6 +204,8 @@ const struct dpu_mdss_cfg dpu_sdm845_cfg = { > .sspp = sdm845_sspp, > .mixer_count = ARRAY_SIZE(sdm845_lm), > .mixer = sdm845_lm, > + .dspp_count = ARRAY_SIZE(sdm845_dspp), > + .dspp = sdm845_dspp, > .pingpong_count = ARRAY_SIZE(sdm845_pp), > .pingpong = sdm845_pp, > .dsc_count = ARRAY_SIZE(sdm845_dsc),
On 12/06/2023 22:35, Abhinav Kumar wrote: > > > On 6/12/2023 11:25 AM, Dmitry Baryshkov wrote: >> Add definitions of DSPP blocks present on the sdm845 platform. This >> should enable color-management on sdm845-bassed devices. >> >> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >> --- >> .../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 21 +++++++++++++++---- >> 1 file changed, 17 insertions(+), 4 deletions(-) >> > > This change itself is fine, hence > > Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > > one note below for a future cleanup: > >> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h >> b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h >> index 36ea1af10894..b6098141bb9b 100644 >> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h >> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h >> @@ -96,19 +96,30 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = { >> static const struct dpu_lm_cfg sdm845_lm[] = { >> LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, >> - &sdm845_lm_sblk, PINGPONG_0, LM_1, 0), >> + &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0), >> LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, >> - &sdm845_lm_sblk, PINGPONG_1, LM_0, 0), >> + &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1), >> LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, >> - &sdm845_lm_sblk, PINGPONG_2, LM_5, 0), >> + &sdm845_lm_sblk, PINGPONG_2, LM_5, DSPP_2), >> LM_BLK("lm_3", LM_3, 0x0, MIXER_SDM845_MASK, >> - &sdm845_lm_sblk, PINGPONG_NONE, 0, 0), >> + &sdm845_lm_sblk, PINGPONG_NONE, 0, DSPP_3), >> LM_BLK("lm_4", LM_4, 0x0, MIXER_SDM845_MASK, >> &sdm845_lm_sblk, PINGPONG_NONE, 0, 0), >> LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK, >> &sdm845_lm_sblk, PINGPONG_3, LM_2, 0), >> }; >> +static const struct dpu_dspp_cfg sdm845_dspp[] = { >> + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, >> + &sm8150_dspp_sblk), >> + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, >> + &sm8150_dspp_sblk), >> + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, >> + &sm8150_dspp_sblk), >> + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, >> + &sm8150_dspp_sblk), >> +}; >> + > > I see the len of pcc blocks should be 0x88 not 0x90 as sm8150_dspp_sblk > explains. > > Also, I need to do some digging on the PCC version here. Can you pls > provide me the link to downstream source which mentions PCC version is > 4.0 for sdm845? Sure, https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.8.3.c25-08000-sdm845.0/arch/arm64/boot/dts/qcom/sdm845-sde.dtsi#L233 > >> static const struct dpu_pingpong_cfg sdm845_pp[] = { >> PP_BLK("pingpong_0", PINGPONG_0, 0x70000, >> PINGPONG_SDM845_TE2_MASK, 0, sdm845_pp_sblk_te, >> DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), >> @@ -193,6 +204,8 @@ const struct dpu_mdss_cfg dpu_sdm845_cfg = { >> .sspp = sdm845_sspp, >> .mixer_count = ARRAY_SIZE(sdm845_lm), >> .mixer = sdm845_lm, >> + .dspp_count = ARRAY_SIZE(sdm845_dspp), >> + .dspp = sdm845_dspp, >> .pingpong_count = ARRAY_SIZE(sdm845_pp), >> .pingpong = sdm845_pp, >> .dsc_count = ARRAY_SIZE(sdm845_dsc),
On 2023-06-12 21:25:34, Dmitry Baryshkov wrote: > Add definitions of DSPP blocks present on the sdm845 platform. This > should enable color-management on sdm845-bassed devices. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> And with this, the CTM property is back on SDM845 and functions as intended: I am able to set a color transformation of choice with a quickly-pieced-together DRM utility: https://github.com/MarijnS95/drm-tools Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > .../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 21 +++++++++++++++---- > 1 file changed, 17 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h > index 36ea1af10894..b6098141bb9b 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h > @@ -96,19 +96,30 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = { > > static const struct dpu_lm_cfg sdm845_lm[] = { > LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_0, LM_1, 0), > + &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0), > LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_1, LM_0, 0), > + &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1), > LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_2, LM_5, 0), > + &sdm845_lm_sblk, PINGPONG_2, LM_5, DSPP_2), > LM_BLK("lm_3", LM_3, 0x0, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_NONE, 0, 0), > + &sdm845_lm_sblk, PINGPONG_NONE, 0, DSPP_3), > LM_BLK("lm_4", LM_4, 0x0, MIXER_SDM845_MASK, > &sdm845_lm_sblk, PINGPONG_NONE, 0, 0), > LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK, > &sdm845_lm_sblk, PINGPONG_3, LM_2, 0), > }; > > +static const struct dpu_dspp_cfg sdm845_dspp[] = { > + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > +}; > + > static const struct dpu_pingpong_cfg sdm845_pp[] = { > PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SDM845_TE2_MASK, 0, sdm845_pp_sblk_te, > DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), > @@ -193,6 +204,8 @@ const struct dpu_mdss_cfg dpu_sdm845_cfg = { > .sspp = sdm845_sspp, > .mixer_count = ARRAY_SIZE(sdm845_lm), > .mixer = sdm845_lm, > + .dspp_count = ARRAY_SIZE(sdm845_dspp), > + .dspp = sdm845_dspp, > .pingpong_count = ARRAY_SIZE(sdm845_pp), > .pingpong = sdm845_pp, > .dsc_count = ARRAY_SIZE(sdm845_dsc), > -- > 2.39.2 >
On Mon, 12 Jun 2023 at 23:55, Dmitry Baryshkov <dmitry.baryshkov@linaro.org> wrote: > > Add definitions of DSPP blocks present on the sdm845 platform. This > should enable color-management on sdm845-bassed devices. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > .../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 21 +++++++++++++++---- > 1 file changed, 17 insertions(+), 4 deletions(-) Thanks for your patch, Dmitry. LGTM. Please feel free to add: Reviewed-by: Sumit Semwal <sumit.semwal@linaro.org> > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h > index 36ea1af10894..b6098141bb9b 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h > @@ -96,19 +96,30 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = { > > static const struct dpu_lm_cfg sdm845_lm[] = { > LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_0, LM_1, 0), > + &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0), > LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_1, LM_0, 0), > + &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1), > LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_2, LM_5, 0), > + &sdm845_lm_sblk, PINGPONG_2, LM_5, DSPP_2), > LM_BLK("lm_3", LM_3, 0x0, MIXER_SDM845_MASK, > - &sdm845_lm_sblk, PINGPONG_NONE, 0, 0), > + &sdm845_lm_sblk, PINGPONG_NONE, 0, DSPP_3), > LM_BLK("lm_4", LM_4, 0x0, MIXER_SDM845_MASK, > &sdm845_lm_sblk, PINGPONG_NONE, 0, 0), > LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK, > &sdm845_lm_sblk, PINGPONG_3, LM_2, 0), > }; > > +static const struct dpu_dspp_cfg sdm845_dspp[] = { > + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, > + &sm8150_dspp_sblk), > +}; > + > static const struct dpu_pingpong_cfg sdm845_pp[] = { > PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SDM845_TE2_MASK, 0, sdm845_pp_sblk_te, > DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), > @@ -193,6 +204,8 @@ const struct dpu_mdss_cfg dpu_sdm845_cfg = { > .sspp = sdm845_sspp, > .mixer_count = ARRAY_SIZE(sdm845_lm), > .mixer = sdm845_lm, > + .dspp_count = ARRAY_SIZE(sdm845_dspp), > + .dspp = sdm845_dspp, > .pingpong_count = ARRAY_SIZE(sdm845_pp), > .pingpong = sdm845_pp, > .dsc_count = ARRAY_SIZE(sdm845_dsc), > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h index 36ea1af10894..b6098141bb9b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h @@ -96,19 +96,30 @@ static const struct dpu_sspp_cfg sdm845_sspp[] = { static const struct dpu_lm_cfg sdm845_lm[] = { LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, - &sdm845_lm_sblk, PINGPONG_0, LM_1, 0), + &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0), LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, - &sdm845_lm_sblk, PINGPONG_1, LM_0, 0), + &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1), LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, - &sdm845_lm_sblk, PINGPONG_2, LM_5, 0), + &sdm845_lm_sblk, PINGPONG_2, LM_5, DSPP_2), LM_BLK("lm_3", LM_3, 0x0, MIXER_SDM845_MASK, - &sdm845_lm_sblk, PINGPONG_NONE, 0, 0), + &sdm845_lm_sblk, PINGPONG_NONE, 0, DSPP_3), LM_BLK("lm_4", LM_4, 0x0, MIXER_SDM845_MASK, &sdm845_lm_sblk, PINGPONG_NONE, 0, 0), LM_BLK("lm_5", LM_5, 0x49000, MIXER_SDM845_MASK, &sdm845_lm_sblk, PINGPONG_3, LM_2, 0), }; +static const struct dpu_dspp_cfg sdm845_dspp[] = { + DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK, + &sm8150_dspp_sblk), + DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK, + &sm8150_dspp_sblk), + DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK, + &sm8150_dspp_sblk), + DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK, + &sm8150_dspp_sblk), +}; + static const struct dpu_pingpong_cfg sdm845_pp[] = { PP_BLK("pingpong_0", PINGPONG_0, 0x70000, PINGPONG_SDM845_TE2_MASK, 0, sdm845_pp_sblk_te, DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), @@ -193,6 +204,8 @@ const struct dpu_mdss_cfg dpu_sdm845_cfg = { .sspp = sdm845_sspp, .mixer_count = ARRAY_SIZE(sdm845_lm), .mixer = sdm845_lm, + .dspp_count = ARRAY_SIZE(sdm845_dspp), + .dspp = sdm845_dspp, .pingpong_count = ARRAY_SIZE(sdm845_pp), .pingpong = sdm845_pp, .dsc_count = ARRAY_SIZE(sdm845_dsc),
Add definitions of DSPP blocks present on the sdm845 platform. This should enable color-management on sdm845-bassed devices. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- .../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 21 +++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-)