| Message ID | 20230612220632.1885175-1-quic_bjorande@quicinc.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | arm64: dts: qcom: sc8180x: Fix LLCC reg property | expand |
On 13.06.2023 00:06, Bjorn Andersson wrote: > The LLCC binding and driver was recently corrected to handle the stride > varying between platforms. Switch to the new format to ensure accesses > are done in the right place. > > Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform") > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sc8180x.dtsi | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi > index 88015742315b..3de62e26d56a 100644 > --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi > @@ -2541,8 +2541,11 @@ usb_sec_dpphy: dp-phy@88ef200 { > > system-cache-controller@9200000 { > compatible = "qcom,sc8180x-llcc"; > - reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; > - reg-names = "llcc_base", "llcc_broadcast_base"; > + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, Is there anything inbetween these register ranges? Should they be 0x80000-long? Konrad > + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, > + <0 0x09600000 0 0x50000>; > + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", > + "llcc3_base", "llcc_broadcast_base"; > interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; > }; >
On Mon, 12 Jun 2023 15:06:32 -0700, Bjorn Andersson wrote: > The LLCC binding and driver was recently corrected to handle the stride > varying between platforms. Switch to the new format to ensure accesses > are done in the right place. > > Applied, thanks! [1/1] arm64: dts: qcom: sc8180x: Fix LLCC reg property commit: 74cf6675c35ec3034053a69926f4d98e52852eb0 Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index 88015742315b..3de62e26d56a 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -2541,8 +2541,11 @@ usb_sec_dpphy: dp-phy@88ef200 { system-cache-controller@9200000 { compatible = "qcom,sc8180x-llcc"; - reg = <0 0x09200000 0 0x50000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; };
The LLCC binding and driver was recently corrected to handle the stride varying between platforms. Switch to the new format to ensure accesses are done in the right place. Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform") Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)