| Message ID | 20230625202547.174647-17-dmitry.baryshkov@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ARM: qcom: apq8064: support CPU frequency scaling | expand |
On 25.06.2023 22:25, Dmitry Baryshkov wrote: > Populate L2 cache node with clock, supplies and OPP information to > facilitate scaling L2 frequency. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- Are the L2 voltage ranges independent of speedbin? Konrad > arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 101 ++++++++++++++++++++++- > 1 file changed, 100 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi > index 1eb6d752ebae..ac07170c702f 100644 > --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi > +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi > @@ -81,9 +81,108 @@ CPU3: cpu@3 { > }; > > L2: l2-cache { > - compatible = "cache"; > + compatible = "qcom,krait-l2-cache", "cache"; > cache-level = <2>; > cache-unified; > + vdd-mem-supply = <&pm8921_l24>; > + vdd-dig-supply = <&pm8921_s3>; > + clocks = <&kraitcc KRAIT_L2>; > + #interconnect-cells = <1>; > + operating-points-v2 = <&l2_opp_table>; > + > + l2_opp_table: opp-table-l2 { > + compatible = "operating-points-v2"; > + > + opp-384000000 { > + opp-hz = /bits/ 64 <384000000>; > + opp-microvolt = <1050000 1050000 1150000>, > + <950000 950000 1150000>; > + }; > + > + opp-432000000 { > + opp-hz = /bits/ 64 <432000000>; > + opp-microvolt = <1050000 1050000 1150000>, > + <1050000 1050000 1150000>; > + }; > + > + opp-486000000 { > + opp-hz = /bits/ 64 <486000000>; > + opp-microvolt = <1050000 1050000 1150000>, > + <1050000 1050000 1150000>; > + }; > + > + opp-540000000 { > + opp-hz = /bits/ 64 <540000000>; > + opp-microvolt = <1050000 1050000 1150000>, > + <1050000 1050000 1150000>; > + }; > + > + opp-594000000 { > + opp-hz = /bits/ 64 <594000000>; > + opp-microvolt = <1050000 1050000 1150000>, > + <1050000 1050000 1150000>; > + }; > + > + opp-648000000 { > + opp-hz = /bits/ 64 <648000000>; > + opp-microvolt = <1050000 1050000 1150000>, > + <1050000 1050000 1150000>; > + }; > + > + opp-702000000 { > + opp-hz = /bits/ 64 <702000000>; > + opp-microvolt = <1150000 1150000 1150000>, > + <1150000 1150000 1150000>; > + }; > + > + opp-756000000 { > + opp-hz = /bits/ 64 <756000000>; > + opp-microvolt = <1150000 1150000 1150000>, > + <1150000 1150000 1150000>; > + }; > + > + opp-810000000 { > + opp-hz = /bits/ 64 <810000000>; > + opp-microvolt = <1150000 1150000 1150000>, > + <1150000 1150000 1150000>; > + }; > + > + opp-864000000 { > + opp-hz = /bits/ 64 <864000000>; > + opp-microvolt = <1150000 1150000 1150000>, > + <1150000 1150000 1150000>; > + }; > + > + opp-918000000 { > + opp-hz = /bits/ 64 <918000000>; > + opp-microvolt = <1150000 1150000 1150000>, > + <1150000 1150000 1150000>; > + }; > + > + opp-972000000 { > + opp-hz = /bits/ 64 <972000000>; > + opp-microvolt = <1150000 1150000 1150000>, > + <1150000 1150000 1150000>; > + }; > + > + opp-1026000000 { > + opp-hz = /bits/ 64 <1026000000>; > + opp-microvolt = <1150000 1150000 1150000>, > + <1150000 1150000 1150000>; > + }; > + > + opp-1080000000 { > + opp-hz = /bits/ 64 <1080000000>; > + opp-microvolt = <1150000 1150000 1150000>, > + <1150000 1150000 1150000>; > + }; > + > + opp-1134000000 { > + opp-hz = /bits/ 64 <1134000000>; > + opp-microvolt = <1150000 1150000 1150000>, > + <1150000 1150000 1150000>; > + }; > + }; > }; > > idle-states {
On 26.06.2023 18:37, Konrad Dybcio wrote: > On 25.06.2023 22:25, Dmitry Baryshkov wrote: >> Populate L2 cache node with clock, supplies and OPP information to >> facilitate scaling L2 frequency. >> >> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >> --- > Are the L2 voltage ranges independent of speedbin? > > Konrad >> arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 101 ++++++++++++++++++++++- >> 1 file changed, 100 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi >> index 1eb6d752ebae..ac07170c702f 100644 >> --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi >> +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi >> @@ -81,9 +81,108 @@ CPU3: cpu@3 { >> }; >> >> L2: l2-cache { >> - compatible = "cache"; >> + compatible = "qcom,krait-l2-cache", "cache"; >> cache-level = <2>; >> cache-unified; >> + vdd-mem-supply = <&pm8921_l24>; >> + vdd-dig-supply = <&pm8921_s3>; Another thing I've noticed.. we've grown out of referencing PMIC specifics in the SoC dtsi.. Do we know what PMIC configurations has this one shipped with? Konrad >> + clocks = <&kraitcc KRAIT_L2>; >> + #interconnect-cells = <1>; >> + operating-points-v2 = <&l2_opp_table>; >> + >> + l2_opp_table: opp-table-l2 { >> + compatible = "operating-points-v2"; >> + >> + opp-384000000 { >> + opp-hz = /bits/ 64 <384000000>; >> + opp-microvolt = <1050000 1050000 1150000>, >> + <950000 950000 1150000>; >> + }; >> + >> + opp-432000000 { >> + opp-hz = /bits/ 64 <432000000>; >> + opp-microvolt = <1050000 1050000 1150000>, >> + <1050000 1050000 1150000>; >> + }; >> + >> + opp-486000000 { >> + opp-hz = /bits/ 64 <486000000>; >> + opp-microvolt = <1050000 1050000 1150000>, >> + <1050000 1050000 1150000>; >> + }; >> + >> + opp-540000000 { >> + opp-hz = /bits/ 64 <540000000>; >> + opp-microvolt = <1050000 1050000 1150000>, >> + <1050000 1050000 1150000>; >> + }; >> + >> + opp-594000000 { >> + opp-hz = /bits/ 64 <594000000>; >> + opp-microvolt = <1050000 1050000 1150000>, >> + <1050000 1050000 1150000>; >> + }; >> + >> + opp-648000000 { >> + opp-hz = /bits/ 64 <648000000>; >> + opp-microvolt = <1050000 1050000 1150000>, >> + <1050000 1050000 1150000>; >> + }; >> + >> + opp-702000000 { >> + opp-hz = /bits/ 64 <702000000>; >> + opp-microvolt = <1150000 1150000 1150000>, >> + <1150000 1150000 1150000>; >> + }; >> + >> + opp-756000000 { >> + opp-hz = /bits/ 64 <756000000>; >> + opp-microvolt = <1150000 1150000 1150000>, >> + <1150000 1150000 1150000>; >> + }; >> + >> + opp-810000000 { >> + opp-hz = /bits/ 64 <810000000>; >> + opp-microvolt = <1150000 1150000 1150000>, >> + <1150000 1150000 1150000>; >> + }; >> + >> + opp-864000000 { >> + opp-hz = /bits/ 64 <864000000>; >> + opp-microvolt = <1150000 1150000 1150000>, >> + <1150000 1150000 1150000>; >> + }; >> + >> + opp-918000000 { >> + opp-hz = /bits/ 64 <918000000>; >> + opp-microvolt = <1150000 1150000 1150000>, >> + <1150000 1150000 1150000>; >> + }; >> + >> + opp-972000000 { >> + opp-hz = /bits/ 64 <972000000>; >> + opp-microvolt = <1150000 1150000 1150000>, >> + <1150000 1150000 1150000>; >> + }; >> + >> + opp-1026000000 { >> + opp-hz = /bits/ 64 <1026000000>; >> + opp-microvolt = <1150000 1150000 1150000>, >> + <1150000 1150000 1150000>; >> + }; >> + >> + opp-1080000000 { >> + opp-hz = /bits/ 64 <1080000000>; >> + opp-microvolt = <1150000 1150000 1150000>, >> + <1150000 1150000 1150000>; >> + }; >> + >> + opp-1134000000 { >> + opp-hz = /bits/ 64 <1134000000>; >> + opp-microvolt = <1150000 1150000 1150000>, >> + <1150000 1150000 1150000>; >> + }; >> + }; >> }; >> >> idle-states {
On 26/06/2023 19:46, Konrad Dybcio wrote: > On 26.06.2023 18:37, Konrad Dybcio wrote: >> On 25.06.2023 22:25, Dmitry Baryshkov wrote: >>> Populate L2 cache node with clock, supplies and OPP information to >>> facilitate scaling L2 frequency. >>> >>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >>> --- >> Are the L2 voltage ranges independent of speedbin? Yes. Only Core freq and voltage seem to be a matter of speedbin/pvs classification. >> >> Konrad >>> arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 101 ++++++++++++++++++++++- >>> 1 file changed, 100 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi >>> index 1eb6d752ebae..ac07170c702f 100644 >>> --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi >>> +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi >>> @@ -81,9 +81,108 @@ CPU3: cpu@3 { >>> }; >>> >>> L2: l2-cache { >>> - compatible = "cache"; >>> + compatible = "qcom,krait-l2-cache", "cache"; >>> cache-level = <2>; >>> cache-unified; >>> + vdd-mem-supply = <&pm8921_l24>; >>> + vdd-dig-supply = <&pm8921_s3>; > Another thing I've noticed.. we've grown out of referencing > PMIC specifics in the SoC dtsi.. > > Do we know what PMIC configurations has this one shipped with? It is either pm8921+pm8821, or pmm8920, which integrates pm8921 and pm8921 dies in a single module (but keeps software interface). In theory splitting pm8921 to a separate file would allow somewhat more sharing between msm8960 and apq8064. Let me take a look.
diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi index 1eb6d752ebae..ac07170c702f 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -81,9 +81,108 @@ CPU3: cpu@3 { }; L2: l2-cache { - compatible = "cache"; + compatible = "qcom,krait-l2-cache", "cache"; cache-level = <2>; cache-unified; + vdd-mem-supply = <&pm8921_l24>; + vdd-dig-supply = <&pm8921_s3>; + clocks = <&kraitcc KRAIT_L2>; + #interconnect-cells = <1>; + operating-points-v2 = <&l2_opp_table>; + + l2_opp_table: opp-table-l2 { + compatible = "operating-points-v2"; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-microvolt = <1050000 1050000 1150000>, + <950000 950000 1150000>; + }; + + opp-432000000 { + opp-hz = /bits/ 64 <432000000>; + opp-microvolt = <1050000 1050000 1150000>, + <1050000 1050000 1150000>; + }; + + opp-486000000 { + opp-hz = /bits/ 64 <486000000>; + opp-microvolt = <1050000 1050000 1150000>, + <1050000 1050000 1150000>; + }; + + opp-540000000 { + opp-hz = /bits/ 64 <540000000>; + opp-microvolt = <1050000 1050000 1150000>, + <1050000 1050000 1150000>; + }; + + opp-594000000 { + opp-hz = /bits/ 64 <594000000>; + opp-microvolt = <1050000 1050000 1150000>, + <1050000 1050000 1150000>; + }; + + opp-648000000 { + opp-hz = /bits/ 64 <648000000>; + opp-microvolt = <1050000 1050000 1150000>, + <1050000 1050000 1150000>; + }; + + opp-702000000 { + opp-hz = /bits/ 64 <702000000>; + opp-microvolt = <1150000 1150000 1150000>, + <1150000 1150000 1150000>; + }; + + opp-756000000 { + opp-hz = /bits/ 64 <756000000>; + opp-microvolt = <1150000 1150000 1150000>, + <1150000 1150000 1150000>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + opp-microvolt = <1150000 1150000 1150000>, + <1150000 1150000 1150000>; + }; + + opp-864000000 { + opp-hz = /bits/ 64 <864000000>; + opp-microvolt = <1150000 1150000 1150000>, + <1150000 1150000 1150000>; + }; + + opp-918000000 { + opp-hz = /bits/ 64 <918000000>; + opp-microvolt = <1150000 1150000 1150000>, + <1150000 1150000 1150000>; + }; + + opp-972000000 { + opp-hz = /bits/ 64 <972000000>; + opp-microvolt = <1150000 1150000 1150000>, + <1150000 1150000 1150000>; + }; + + opp-1026000000 { + opp-hz = /bits/ 64 <1026000000>; + opp-microvolt = <1150000 1150000 1150000>, + <1150000 1150000 1150000>; + }; + + opp-1080000000 { + opp-hz = /bits/ 64 <1080000000>; + opp-microvolt = <1150000 1150000 1150000>, + <1150000 1150000 1150000>; + }; + + opp-1134000000 { + opp-hz = /bits/ 64 <1134000000>; + opp-microvolt = <1150000 1150000 1150000>, + <1150000 1150000 1150000>; + }; + }; }; idle-states {
Populate L2 cache node with clock, supplies and OPP information to facilitate scaling L2 frequency. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 101 ++++++++++++++++++++++- 1 file changed, 100 insertions(+), 1 deletion(-)