| Message ID | 20230627-c630-uart-and-1p2-reg-v1-1-b48bfb47639b@linaro.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: dts: qcom: some sdm850/c630 bits | expand |
On 27.06.2023 17:32, Caleb Connolly wrote: > The VCC and VCCA supplies of the DSI<->eDP bridge are derived from > vreg_l2a_1p2 and controlled by a GPIO on the PMIC. Add the regulator > here so Linux can control it. > > Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> > --- > .../boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 30 ++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts > index 22a7d997cdb0..94e37e5d2177 100644 > --- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts > +++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts > @@ -80,6 +80,22 @@ adsp_mem: memory@8c600000 { > }; > }; > > + sw_edp_1p2: edp-1p2-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "sw_edp_1p2"; > + > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&sw_edp_1p2_en>; property property-names > + > + gpio = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + > + vin-supply = <&vreg_l2a_1p2>; > + }; > + > sn65dsi86_refclk: sn65dsi86-refclk { > compatible = "fixed-clock"; > #clock-cells = <0>; > @@ -425,6 +441,8 @@ sn65dsi86: bridge@2c { > > enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; > > + vcca-supply = <&sw_edp_1p2>; > + vcc-supply = <&sw_edp_1p2>; > vpll-supply = <&vreg_l14a_1p88>; > vccio-supply = <&vreg_l14a_1p88>; > > @@ -500,6 +518,18 @@ &mss_pil { > firmware-name = "qcom/sdm850/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/sdm850/LENOVO/81JL/qcdsp2850.mbn"; > }; > > +&pm8998_gpios { > + /* This pin is pulled down by a fixed resistor */ > + sw_edp_1p2_en: pm8998-gpio9-state { > + pinconf { drop pinconf{}, it's unnecessary Konrad > + pins = "gpio9"; > + function = "normal"; > + bias-disable; > + qcom,drive-strength = <0>; > + }; > + }; > +}; > + > &qup_i2c10_default { > drive-strength = <2>; > bias-disable; >
diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts index 22a7d997cdb0..94e37e5d2177 100644 --- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts +++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts @@ -80,6 +80,22 @@ adsp_mem: memory@8c600000 { }; }; + sw_edp_1p2: edp-1p2-regulator { + compatible = "regulator-fixed"; + regulator-name = "sw_edp_1p2"; + + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + + pinctrl-names = "default"; + pinctrl-0 = <&sw_edp_1p2_en>; + + gpio = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>; + enable-active-high; + + vin-supply = <&vreg_l2a_1p2>; + }; + sn65dsi86_refclk: sn65dsi86-refclk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -425,6 +441,8 @@ sn65dsi86: bridge@2c { enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; + vcca-supply = <&sw_edp_1p2>; + vcc-supply = <&sw_edp_1p2>; vpll-supply = <&vreg_l14a_1p88>; vccio-supply = <&vreg_l14a_1p88>; @@ -500,6 +518,18 @@ &mss_pil { firmware-name = "qcom/sdm850/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/sdm850/LENOVO/81JL/qcdsp2850.mbn"; }; +&pm8998_gpios { + /* This pin is pulled down by a fixed resistor */ + sw_edp_1p2_en: pm8998-gpio9-state { + pinconf { + pins = "gpio9"; + function = "normal"; + bias-disable; + qcom,drive-strength = <0>; + }; + }; +}; + &qup_i2c10_default { drive-strength = <2>; bias-disable;
The VCC and VCCA supplies of the DSI<->eDP bridge are derived from vreg_l2a_1p2 and controlled by a GPIO on the PMIC. Add the regulator here so Linux can control it. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> --- .../boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+)