diff mbox series

[2/2] arm64: dts: qcom: ipq5018: add support for the RDP434 variant

Message ID 20230720075731.20816-3-quic_harihk@quicinc.com (mailing list archive)
State Superseded
Headers show
Series Add initial support for RDP434 of IPQ5018 family | expand

Commit Message

Hariharan K July 20, 2023, 7:57 a.m. UTC 
Add the initial device tree support for the Reference Design
Platform(RDP) 434 based on IPQ5018 family of SoC. This patch
carries the support for Console UART and eMMC.

Signed-off-by: Hariharan K <quic_harihk@quicinc.com>
---
 arch/arm64/boot/dts/qcom/Makefile           |  1 +
 arch/arm64/boot/dts/qcom/ipq5018-rdp434.dts | 49 +++++++++++++++++++++
 2 files changed, 50 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/ipq5018-rdp434.dts
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 6334e552b7c1..8a764e37330f 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -5,6 +5,7 @@  dtb-$(CONFIG_ARCH_QCOM)	+= apq8094-sony-xperia-kitakami-karin_windy.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-db820c.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= apq8096-ifc6640.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= ipq5018-rdp432-c2.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= ipq5018-rdp434.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp441.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp442.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= ipq5332-rdp468.dtb
diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp434.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp434.dts
new file mode 100644
index 000000000000..1684739e40ab
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp434.dts
@@ -0,0 +1,49 @@ 
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * IPQ5018 MP03.6-C2 board device tree source
+ * Copyright (c) 2023, The Linux Foundation. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "ipq5018-rdp-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP03.6-C2";
+	compatible = "qcom,ipq5018-ap-mp03.6-c2", "qcom,ipq5018";
+};
+
+&sdhc_1 {
+	pinctrl-0 = <&sdc_default_state>;
+	pinctrl-names = "default";
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	max-frequency = <192000000>;
+	bus-width = <4>;
+	status = "okay";
+};
+
+&tlmm {
+	sdc_default_state: sdc-default-state {
+		clk-pins {
+			pins = "gpio9";
+			function = "sdc1_clk";
+			drive-strength = <8>;
+			bias-disable;
+		};
+
+		cmd-pins {
+			pins = "gpio8";
+			function = "sdc1_cmd";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		data-pins {
+			pins = "gpio4", "gpio5", "gpio6", "gpio7";
+			function = "sdc1_data";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+};