diff mbox series

ARM: dts: qcom: ipq4019: correct SDHCI XO clock

Message ID 20230810132904.367418-1-robert.marko@sartura.hr (mailing list archive)
State Superseded
Headers show
Series ARM: dts: qcom: ipq4019: correct SDHCI XO clock | expand

Commit Message

Robert Marko Aug. 10, 2023, 1:28 p.m. UTC
Using GCC_DCD_XO_CLK as the XO clock for SDHCI controller is not correct,
it seems that I somehow made a mistake of passing it instead of the fixed
XO clock.

Fixes: 04b3b72b5b8f ("ARM: dts: qcom: ipq4019: Add SDHCI controller node")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
 arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Konrad Dybcio Aug. 10, 2023, 5:56 p.m. UTC | #1
On 10.08.2023 15:28, Robert Marko wrote:
> Using GCC_DCD_XO_CLK as the XO clock for SDHCI controller is not correct,
> it seems that I somehow made a mistake of passing it instead of the fixed
> XO clock.
> 
> Fixes: 04b3b72b5b8f ("ARM: dts: qcom: ipq4019: Add SDHCI controller node")
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> ---
Is this another IPQ without RPM?

If so, this patch looks good, but please take the liberty to make clocks
and clock-names one-per-line :)

Konrad
Robert Marko Aug. 11, 2023, 8:46 a.m. UTC | #2
On Thu, Aug 10, 2023 at 7:56 PM Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>
> On 10.08.2023 15:28, Robert Marko wrote:
> > Using GCC_DCD_XO_CLK as the XO clock for SDHCI controller is not correct,
> > it seems that I somehow made a mistake of passing it instead of the fixed
> > XO clock.
> >
> > Fixes: 04b3b72b5b8f ("ARM: dts: qcom: ipq4019: Add SDHCI controller node")
> > Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> > ---
> Is this another IPQ without RPM?

Yes, AFAIK there is no RPM on this one.

>
> If so, this patch looks good, but please take the liberty to make clocks
> and clock-names one-per-line :)

Will do in v2.

Regards,
Robert
>
> Konrad
Bjorn Andersson Aug. 11, 2023, 3:20 p.m. UTC | #3
On Thu, 10 Aug 2023 15:28:21 +0200, Robert Marko wrote:
> Using GCC_DCD_XO_CLK as the XO clock for SDHCI controller is not correct,
> it seems that I somehow made a mistake of passing it instead of the fixed
> XO clock.
> 
> 

Applied, thanks!

[1/1] ARM: dts: qcom: ipq4019: correct SDHCI XO clock
      commit: 43a0ce827528bdc7f4d38d48d13987db24a4e7b1

Best regards,
Konrad Dybcio Aug. 11, 2023, 3:22 p.m. UTC | #4
On 11.08.2023 17:20, Bjorn Andersson wrote:
> 
> On Thu, 10 Aug 2023 15:28:21 +0200, Robert Marko wrote:
>> Using GCC_DCD_XO_CLK as the XO clock for SDHCI controller is not correct,
>> it seems that I somehow made a mistake of passing it instead of the fixed
>> XO clock.
>>
>>
> 
> Applied, thanks!
> 
> [1/1] ARM: dts: qcom: ipq4019: correct SDHCI XO clock
>       commit: 43a0ce827528bdc7f4d38d48d13987db24a4e7b1
Please pick the v2 instead

Konrad
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi
index 5492aeed14a5..450179fbed32 100644
--- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi
@@ -231,8 +231,7 @@  sdhci: mmc@7824900 {
 			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "hc_irq", "pwr_irq";
 			bus-width = <8>;
-			clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>,
-				 <&gcc GCC_DCD_XO_CLK>;
+			clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>, <&xo>;
 			clock-names = "iface", "core", "xo";
 			status = "disabled";
 		};